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Issue 2700813002: [V8] Implement SIMD Boolean vector types to allow mask registers. (Closed)
Patch Set: Rebase. Created 3 years, 10 months ago
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1 // Copyright 2014 the V8 project authors. All rights reserved. 1 // Copyright 2014 the V8 project authors. All rights reserved.
2 // Use of this source code is governed by a BSD-style license that can be 2 // Use of this source code is governed by a BSD-style license that can be
3 // found in the LICENSE file. 3 // found in the LICENSE file.
4 4
5 #include "src/compiler/instruction-selector.h" 5 #include "src/compiler/instruction-selector.h"
6 6
7 #include <limits> 7 #include <limits>
8 8
9 #include "src/base/adapters.h" 9 #include "src/base/adapters.h"
10 #include "src/compiler/compiler-source-position-table.h" 10 #include "src/compiler/compiler-source-position-table.h"
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1468 return MarkAsSimd128(node), VisitFloat32x4FromUint32x4(node); 1468 return MarkAsSimd128(node), VisitFloat32x4FromUint32x4(node);
1469 case IrOpcode::kFloat32x4Abs: 1469 case IrOpcode::kFloat32x4Abs:
1470 return MarkAsSimd128(node), VisitFloat32x4Abs(node); 1470 return MarkAsSimd128(node), VisitFloat32x4Abs(node);
1471 case IrOpcode::kFloat32x4Neg: 1471 case IrOpcode::kFloat32x4Neg:
1472 return MarkAsSimd128(node), VisitFloat32x4Neg(node); 1472 return MarkAsSimd128(node), VisitFloat32x4Neg(node);
1473 case IrOpcode::kFloat32x4Add: 1473 case IrOpcode::kFloat32x4Add:
1474 return MarkAsSimd128(node), VisitFloat32x4Add(node); 1474 return MarkAsSimd128(node), VisitFloat32x4Add(node);
1475 case IrOpcode::kFloat32x4Sub: 1475 case IrOpcode::kFloat32x4Sub:
1476 return MarkAsSimd128(node), VisitFloat32x4Sub(node); 1476 return MarkAsSimd128(node), VisitFloat32x4Sub(node);
1477 case IrOpcode::kFloat32x4Equal: 1477 case IrOpcode::kFloat32x4Equal:
1478 return MarkAsSimd128(node), VisitFloat32x4Equal(node); 1478 return MarkAsSimd1x4(node), VisitFloat32x4Equal(node);
1479 case IrOpcode::kFloat32x4NotEqual: 1479 case IrOpcode::kFloat32x4NotEqual:
1480 return MarkAsSimd128(node), VisitFloat32x4NotEqual(node); 1480 return MarkAsSimd1x4(node), VisitFloat32x4NotEqual(node);
1481 case IrOpcode::kCreateInt32x4: 1481 case IrOpcode::kCreateInt32x4:
1482 return MarkAsSimd128(node), VisitCreateInt32x4(node); 1482 return MarkAsSimd128(node), VisitCreateInt32x4(node);
1483 case IrOpcode::kInt32x4ExtractLane: 1483 case IrOpcode::kInt32x4ExtractLane:
1484 return MarkAsWord32(node), VisitInt32x4ExtractLane(node); 1484 return MarkAsWord32(node), VisitInt32x4ExtractLane(node);
1485 case IrOpcode::kInt32x4ReplaceLane: 1485 case IrOpcode::kInt32x4ReplaceLane:
1486 return MarkAsSimd128(node), VisitInt32x4ReplaceLane(node); 1486 return MarkAsSimd128(node), VisitInt32x4ReplaceLane(node);
1487 case IrOpcode::kInt32x4FromFloat32x4: 1487 case IrOpcode::kInt32x4FromFloat32x4:
1488 return MarkAsSimd128(node), VisitInt32x4FromFloat32x4(node); 1488 return MarkAsSimd128(node), VisitInt32x4FromFloat32x4(node);
1489 case IrOpcode::kUint32x4FromFloat32x4: 1489 case IrOpcode::kUint32x4FromFloat32x4:
1490 return MarkAsSimd128(node), VisitUint32x4FromFloat32x4(node); 1490 return MarkAsSimd128(node), VisitUint32x4FromFloat32x4(node);
1491 case IrOpcode::kInt32x4Neg: 1491 case IrOpcode::kInt32x4Neg:
1492 return MarkAsSimd128(node), VisitInt32x4Neg(node); 1492 return MarkAsSimd128(node), VisitInt32x4Neg(node);
1493 case IrOpcode::kInt32x4ShiftLeftByScalar: 1493 case IrOpcode::kInt32x4ShiftLeftByScalar:
1494 return MarkAsSimd128(node), VisitInt32x4ShiftLeftByScalar(node); 1494 return MarkAsSimd128(node), VisitInt32x4ShiftLeftByScalar(node);
1495 case IrOpcode::kInt32x4ShiftRightByScalar: 1495 case IrOpcode::kInt32x4ShiftRightByScalar:
1496 return MarkAsSimd128(node), VisitInt32x4ShiftRightByScalar(node); 1496 return MarkAsSimd128(node), VisitInt32x4ShiftRightByScalar(node);
1497 case IrOpcode::kInt32x4Add: 1497 case IrOpcode::kInt32x4Add:
1498 return MarkAsSimd128(node), VisitInt32x4Add(node); 1498 return MarkAsSimd128(node), VisitInt32x4Add(node);
1499 case IrOpcode::kInt32x4Sub: 1499 case IrOpcode::kInt32x4Sub:
1500 return MarkAsSimd128(node), VisitInt32x4Sub(node); 1500 return MarkAsSimd128(node), VisitInt32x4Sub(node);
1501 case IrOpcode::kInt32x4Mul: 1501 case IrOpcode::kInt32x4Mul:
1502 return MarkAsSimd128(node), VisitInt32x4Mul(node); 1502 return MarkAsSimd128(node), VisitInt32x4Mul(node);
1503 case IrOpcode::kInt32x4Min: 1503 case IrOpcode::kInt32x4Min:
1504 return MarkAsSimd128(node), VisitInt32x4Min(node); 1504 return MarkAsSimd128(node), VisitInt32x4Min(node);
1505 case IrOpcode::kInt32x4Max: 1505 case IrOpcode::kInt32x4Max:
1506 return MarkAsSimd128(node), VisitInt32x4Max(node); 1506 return MarkAsSimd128(node), VisitInt32x4Max(node);
1507 case IrOpcode::kInt32x4Equal: 1507 case IrOpcode::kInt32x4Equal:
1508 return MarkAsSimd128(node), VisitInt32x4Equal(node); 1508 return MarkAsSimd1x4(node), VisitInt32x4Equal(node);
1509 case IrOpcode::kInt32x4NotEqual: 1509 case IrOpcode::kInt32x4NotEqual:
1510 return MarkAsSimd128(node), VisitInt32x4NotEqual(node); 1510 return MarkAsSimd1x4(node), VisitInt32x4NotEqual(node);
1511 case IrOpcode::kInt32x4GreaterThan: 1511 case IrOpcode::kInt32x4GreaterThan:
1512 return MarkAsSimd128(node), VisitInt32x4GreaterThan(node); 1512 return MarkAsSimd1x4(node), VisitInt32x4GreaterThan(node);
1513 case IrOpcode::kInt32x4GreaterThanOrEqual: 1513 case IrOpcode::kInt32x4GreaterThanOrEqual:
1514 return MarkAsSimd128(node), VisitInt32x4GreaterThanOrEqual(node); 1514 return MarkAsSimd1x4(node), VisitInt32x4GreaterThanOrEqual(node);
1515 case IrOpcode::kUint32x4ShiftRightByScalar: 1515 case IrOpcode::kUint32x4ShiftRightByScalar:
1516 return MarkAsSimd128(node), VisitUint32x4ShiftRightByScalar(node); 1516 return MarkAsSimd128(node), VisitUint32x4ShiftRightByScalar(node);
1517 case IrOpcode::kUint32x4Min: 1517 case IrOpcode::kUint32x4Min:
1518 return MarkAsSimd128(node), VisitUint32x4Min(node); 1518 return MarkAsSimd128(node), VisitUint32x4Min(node);
1519 case IrOpcode::kUint32x4Max: 1519 case IrOpcode::kUint32x4Max:
1520 return MarkAsSimd128(node), VisitUint32x4Max(node); 1520 return MarkAsSimd128(node), VisitUint32x4Max(node);
1521 case IrOpcode::kUint32x4GreaterThan: 1521 case IrOpcode::kUint32x4GreaterThan:
1522 return MarkAsSimd128(node), VisitUint32x4GreaterThan(node); 1522 return MarkAsSimd1x4(node), VisitUint32x4GreaterThan(node);
1523 case IrOpcode::kUint32x4GreaterThanOrEqual: 1523 case IrOpcode::kUint32x4GreaterThanOrEqual:
1524 return MarkAsSimd128(node), VisitUint32x4GreaterThanOrEqual(node); 1524 return MarkAsSimd1x4(node), VisitUint32x4GreaterThanOrEqual(node);
1525 case IrOpcode::kCreateInt16x8: 1525 case IrOpcode::kCreateInt16x8:
1526 return MarkAsSimd128(node), VisitCreateInt16x8(node); 1526 return MarkAsSimd128(node), VisitCreateInt16x8(node);
1527 case IrOpcode::kInt16x8ExtractLane: 1527 case IrOpcode::kInt16x8ExtractLane:
1528 return MarkAsWord32(node), VisitInt16x8ExtractLane(node); 1528 return MarkAsWord32(node), VisitInt16x8ExtractLane(node);
1529 case IrOpcode::kInt16x8ReplaceLane: 1529 case IrOpcode::kInt16x8ReplaceLane:
1530 return MarkAsSimd128(node), VisitInt16x8ReplaceLane(node); 1530 return MarkAsSimd128(node), VisitInt16x8ReplaceLane(node);
1531 case IrOpcode::kInt16x8Neg: 1531 case IrOpcode::kInt16x8Neg:
1532 return MarkAsSimd128(node), VisitInt16x8Neg(node); 1532 return MarkAsSimd128(node), VisitInt16x8Neg(node);
1533 case IrOpcode::kInt16x8ShiftLeftByScalar: 1533 case IrOpcode::kInt16x8ShiftLeftByScalar:
1534 return MarkAsSimd128(node), VisitInt16x8ShiftLeftByScalar(node); 1534 return MarkAsSimd128(node), VisitInt16x8ShiftLeftByScalar(node);
1535 case IrOpcode::kInt16x8ShiftRightByScalar: 1535 case IrOpcode::kInt16x8ShiftRightByScalar:
1536 return MarkAsSimd128(node), VisitInt16x8ShiftRightByScalar(node); 1536 return MarkAsSimd128(node), VisitInt16x8ShiftRightByScalar(node);
1537 case IrOpcode::kInt16x8Add: 1537 case IrOpcode::kInt16x8Add:
1538 return MarkAsSimd128(node), VisitInt16x8Add(node); 1538 return MarkAsSimd128(node), VisitInt16x8Add(node);
1539 case IrOpcode::kInt16x8AddSaturate: 1539 case IrOpcode::kInt16x8AddSaturate:
1540 return MarkAsSimd128(node), VisitInt16x8AddSaturate(node); 1540 return MarkAsSimd128(node), VisitInt16x8AddSaturate(node);
1541 case IrOpcode::kInt16x8Sub: 1541 case IrOpcode::kInt16x8Sub:
1542 return MarkAsSimd128(node), VisitInt16x8Sub(node); 1542 return MarkAsSimd128(node), VisitInt16x8Sub(node);
1543 case IrOpcode::kInt16x8SubSaturate: 1543 case IrOpcode::kInt16x8SubSaturate:
1544 return MarkAsSimd128(node), VisitInt16x8SubSaturate(node); 1544 return MarkAsSimd128(node), VisitInt16x8SubSaturate(node);
1545 case IrOpcode::kInt16x8Mul: 1545 case IrOpcode::kInt16x8Mul:
1546 return MarkAsSimd128(node), VisitInt16x8Mul(node); 1546 return MarkAsSimd128(node), VisitInt16x8Mul(node);
1547 case IrOpcode::kInt16x8Min: 1547 case IrOpcode::kInt16x8Min:
1548 return MarkAsSimd128(node), VisitInt16x8Min(node); 1548 return MarkAsSimd128(node), VisitInt16x8Min(node);
1549 case IrOpcode::kInt16x8Max: 1549 case IrOpcode::kInt16x8Max:
1550 return MarkAsSimd128(node), VisitInt16x8Max(node); 1550 return MarkAsSimd128(node), VisitInt16x8Max(node);
1551 case IrOpcode::kInt16x8Equal: 1551 case IrOpcode::kInt16x8Equal:
1552 return MarkAsSimd128(node), VisitInt16x8Equal(node); 1552 return MarkAsSimd1x8(node), VisitInt16x8Equal(node);
1553 case IrOpcode::kInt16x8NotEqual: 1553 case IrOpcode::kInt16x8NotEqual:
1554 return MarkAsSimd128(node), VisitInt16x8NotEqual(node); 1554 return MarkAsSimd1x8(node), VisitInt16x8NotEqual(node);
1555 case IrOpcode::kInt16x8GreaterThan: 1555 case IrOpcode::kInt16x8GreaterThan:
1556 return MarkAsSimd128(node), VisitInt16x8GreaterThan(node); 1556 return MarkAsSimd1x8(node), VisitInt16x8GreaterThan(node);
1557 case IrOpcode::kInt16x8GreaterThanOrEqual: 1557 case IrOpcode::kInt16x8GreaterThanOrEqual:
1558 return MarkAsSimd128(node), VisitInt16x8GreaterThanOrEqual(node); 1558 return MarkAsSimd1x8(node), VisitInt16x8GreaterThanOrEqual(node);
1559 case IrOpcode::kUint16x8ShiftRightByScalar: 1559 case IrOpcode::kUint16x8ShiftRightByScalar:
1560 return MarkAsSimd128(node), VisitUint16x8ShiftRightByScalar(node); 1560 return MarkAsSimd128(node), VisitUint16x8ShiftRightByScalar(node);
1561 case IrOpcode::kUint16x8AddSaturate: 1561 case IrOpcode::kUint16x8AddSaturate:
1562 return MarkAsSimd128(node), VisitUint16x8AddSaturate(node); 1562 return MarkAsSimd128(node), VisitUint16x8AddSaturate(node);
1563 case IrOpcode::kUint16x8SubSaturate: 1563 case IrOpcode::kUint16x8SubSaturate:
1564 return MarkAsSimd128(node), VisitUint16x8SubSaturate(node); 1564 return MarkAsSimd128(node), VisitUint16x8SubSaturate(node);
1565 case IrOpcode::kUint16x8Min: 1565 case IrOpcode::kUint16x8Min:
1566 return MarkAsSimd128(node), VisitUint16x8Min(node); 1566 return MarkAsSimd128(node), VisitUint16x8Min(node);
1567 case IrOpcode::kUint16x8Max: 1567 case IrOpcode::kUint16x8Max:
1568 return MarkAsSimd128(node), VisitUint16x8Max(node); 1568 return MarkAsSimd128(node), VisitUint16x8Max(node);
1569 case IrOpcode::kUint16x8GreaterThan: 1569 case IrOpcode::kUint16x8GreaterThan:
1570 return MarkAsSimd128(node), VisitUint16x8GreaterThan(node); 1570 return MarkAsSimd1x8(node), VisitUint16x8GreaterThan(node);
1571 case IrOpcode::kUint16x8GreaterThanOrEqual: 1571 case IrOpcode::kUint16x8GreaterThanOrEqual:
1572 return MarkAsSimd128(node), VisitUint16x8GreaterThanOrEqual(node); 1572 return MarkAsSimd1x8(node), VisitUint16x8GreaterThanOrEqual(node);
1573 case IrOpcode::kCreateInt8x16: 1573 case IrOpcode::kCreateInt8x16:
1574 return MarkAsSimd128(node), VisitCreateInt8x16(node); 1574 return MarkAsSimd128(node), VisitCreateInt8x16(node);
1575 case IrOpcode::kInt8x16ExtractLane: 1575 case IrOpcode::kInt8x16ExtractLane:
1576 return MarkAsWord32(node), VisitInt8x16ExtractLane(node); 1576 return MarkAsWord32(node), VisitInt8x16ExtractLane(node);
1577 case IrOpcode::kInt8x16ReplaceLane: 1577 case IrOpcode::kInt8x16ReplaceLane:
1578 return MarkAsSimd128(node), VisitInt8x16ReplaceLane(node); 1578 return MarkAsSimd128(node), VisitInt8x16ReplaceLane(node);
1579 case IrOpcode::kInt8x16Neg: 1579 case IrOpcode::kInt8x16Neg:
1580 return MarkAsSimd128(node), VisitInt8x16Neg(node); 1580 return MarkAsSimd128(node), VisitInt8x16Neg(node);
1581 case IrOpcode::kInt8x16ShiftLeftByScalar: 1581 case IrOpcode::kInt8x16ShiftLeftByScalar:
1582 return MarkAsSimd128(node), VisitInt8x16ShiftLeftByScalar(node); 1582 return MarkAsSimd128(node), VisitInt8x16ShiftLeftByScalar(node);
1583 case IrOpcode::kInt8x16ShiftRightByScalar: 1583 case IrOpcode::kInt8x16ShiftRightByScalar:
1584 return MarkAsSimd128(node), VisitInt8x16ShiftRightByScalar(node); 1584 return MarkAsSimd128(node), VisitInt8x16ShiftRightByScalar(node);
1585 case IrOpcode::kInt8x16Add: 1585 case IrOpcode::kInt8x16Add:
1586 return MarkAsSimd128(node), VisitInt8x16Add(node); 1586 return MarkAsSimd128(node), VisitInt8x16Add(node);
1587 case IrOpcode::kInt8x16AddSaturate: 1587 case IrOpcode::kInt8x16AddSaturate:
1588 return MarkAsSimd128(node), VisitInt8x16AddSaturate(node); 1588 return MarkAsSimd128(node), VisitInt8x16AddSaturate(node);
1589 case IrOpcode::kInt8x16Sub: 1589 case IrOpcode::kInt8x16Sub:
1590 return MarkAsSimd128(node), VisitInt8x16Sub(node); 1590 return MarkAsSimd128(node), VisitInt8x16Sub(node);
1591 case IrOpcode::kInt8x16SubSaturate: 1591 case IrOpcode::kInt8x16SubSaturate:
1592 return MarkAsSimd128(node), VisitInt8x16SubSaturate(node); 1592 return MarkAsSimd128(node), VisitInt8x16SubSaturate(node);
1593 case IrOpcode::kInt8x16Mul: 1593 case IrOpcode::kInt8x16Mul:
1594 return MarkAsSimd128(node), VisitInt8x16Mul(node); 1594 return MarkAsSimd128(node), VisitInt8x16Mul(node);
1595 case IrOpcode::kInt8x16Min: 1595 case IrOpcode::kInt8x16Min:
1596 return MarkAsSimd128(node), VisitInt8x16Min(node); 1596 return MarkAsSimd128(node), VisitInt8x16Min(node);
1597 case IrOpcode::kInt8x16Max: 1597 case IrOpcode::kInt8x16Max:
1598 return MarkAsSimd128(node), VisitInt8x16Max(node); 1598 return MarkAsSimd128(node), VisitInt8x16Max(node);
1599 case IrOpcode::kInt8x16Equal: 1599 case IrOpcode::kInt8x16Equal:
1600 return MarkAsSimd128(node), VisitInt8x16Equal(node); 1600 return MarkAsSimd1x16(node), VisitInt8x16Equal(node);
1601 case IrOpcode::kInt8x16NotEqual: 1601 case IrOpcode::kInt8x16NotEqual:
1602 return MarkAsSimd128(node), VisitInt8x16NotEqual(node); 1602 return MarkAsSimd1x16(node), VisitInt8x16NotEqual(node);
1603 case IrOpcode::kInt8x16GreaterThan: 1603 case IrOpcode::kInt8x16GreaterThan:
1604 return MarkAsSimd128(node), VisitInt8x16GreaterThan(node); 1604 return MarkAsSimd1x16(node), VisitInt8x16GreaterThan(node);
1605 case IrOpcode::kInt8x16GreaterThanOrEqual: 1605 case IrOpcode::kInt8x16GreaterThanOrEqual:
1606 return MarkAsSimd128(node), VisitInt8x16GreaterThanOrEqual(node); 1606 return MarkAsSimd1x16(node), VisitInt8x16GreaterThanOrEqual(node);
1607 case IrOpcode::kUint8x16ShiftRightByScalar: 1607 case IrOpcode::kUint8x16ShiftRightByScalar:
1608 return MarkAsSimd128(node), VisitUint8x16ShiftRightByScalar(node); 1608 return MarkAsSimd128(node), VisitUint8x16ShiftRightByScalar(node);
1609 case IrOpcode::kUint8x16AddSaturate: 1609 case IrOpcode::kUint8x16AddSaturate:
1610 return MarkAsSimd128(node), VisitUint8x16AddSaturate(node); 1610 return MarkAsSimd128(node), VisitUint8x16AddSaturate(node);
1611 case IrOpcode::kUint8x16SubSaturate: 1611 case IrOpcode::kUint8x16SubSaturate:
1612 return MarkAsSimd128(node), VisitUint8x16SubSaturate(node); 1612 return MarkAsSimd128(node), VisitUint8x16SubSaturate(node);
1613 case IrOpcode::kUint8x16Min: 1613 case IrOpcode::kUint8x16Min:
1614 return MarkAsSimd128(node), VisitUint8x16Min(node); 1614 return MarkAsSimd128(node), VisitUint8x16Min(node);
1615 case IrOpcode::kUint8x16Max: 1615 case IrOpcode::kUint8x16Max:
1616 return MarkAsSimd128(node), VisitUint8x16Max(node); 1616 return MarkAsSimd128(node), VisitUint8x16Max(node);
1617 case IrOpcode::kUint8x16GreaterThan: 1617 case IrOpcode::kUint8x16GreaterThan:
1618 return MarkAsSimd128(node), VisitUint8x16GreaterThan(node); 1618 return MarkAsSimd1x16(node), VisitUint8x16GreaterThan(node);
1619 case IrOpcode::kUint8x16GreaterThanOrEqual: 1619 case IrOpcode::kUint8x16GreaterThanOrEqual:
1620 return MarkAsSimd128(node), VisitUint16x8GreaterThanOrEqual(node); 1620 return MarkAsSimd1x16(node), VisitUint16x8GreaterThanOrEqual(node);
1621 case IrOpcode::kSimd128And: 1621 case IrOpcode::kSimd128And:
1622 return MarkAsSimd128(node), VisitSimd128And(node); 1622 return MarkAsSimd128(node), VisitSimd128And(node);
1623 case IrOpcode::kSimd128Or: 1623 case IrOpcode::kSimd128Or:
1624 return MarkAsSimd128(node), VisitSimd128Or(node); 1624 return MarkAsSimd128(node), VisitSimd128Or(node);
1625 case IrOpcode::kSimd128Xor: 1625 case IrOpcode::kSimd128Xor:
1626 return MarkAsSimd128(node), VisitSimd128Xor(node); 1626 return MarkAsSimd128(node), VisitSimd128Xor(node);
1627 case IrOpcode::kSimd128Not: 1627 case IrOpcode::kSimd128Not:
1628 return MarkAsSimd128(node), VisitSimd128Not(node); 1628 return MarkAsSimd128(node), VisitSimd128Not(node);
1629 case IrOpcode::kSimd32x4Select: 1629 case IrOpcode::kSimd32x4Select:
1630 return MarkAsSimd128(node), VisitSimd32x4Select(node); 1630 return MarkAsSimd128(node), VisitSimd32x4Select(node);
(...skipping 587 matching lines...) Expand 10 before | Expand all | Expand 10 after
2218 void InstructionSelector::VisitUint8x16Min(Node* node) { UNIMPLEMENTED(); } 2218 void InstructionSelector::VisitUint8x16Min(Node* node) { UNIMPLEMENTED(); }
2219 2219
2220 void InstructionSelector::VisitUint8x16GreaterThan(Node* node) { 2220 void InstructionSelector::VisitUint8x16GreaterThan(Node* node) {
2221 UNIMPLEMENTED(); 2221 UNIMPLEMENTED();
2222 } 2222 }
2223 2223
2224 void InstructionSelector::VisitUint8x16GreaterThanOrEqual(Node* node) { 2224 void InstructionSelector::VisitUint8x16GreaterThanOrEqual(Node* node) {
2225 UNIMPLEMENTED(); 2225 UNIMPLEMENTED();
2226 } 2226 }
2227 2227
2228 void InstructionSelector::VisitSimd32x4Select(Node* node) { UNIMPLEMENTED(); }
2229
2230 void InstructionSelector::VisitSimd16x8Select(Node* node) { UNIMPLEMENTED(); }
2231
2232 void InstructionSelector::VisitSimd8x16Select(Node* node) { UNIMPLEMENTED(); }
2233
2234 void InstructionSelector::VisitSimd128And(Node* node) { UNIMPLEMENTED(); } 2228 void InstructionSelector::VisitSimd128And(Node* node) { UNIMPLEMENTED(); }
2235 2229
2236 void InstructionSelector::VisitSimd128Or(Node* node) { UNIMPLEMENTED(); } 2230 void InstructionSelector::VisitSimd128Or(Node* node) { UNIMPLEMENTED(); }
2237 2231
2238 void InstructionSelector::VisitSimd128Xor(Node* node) { UNIMPLEMENTED(); } 2232 void InstructionSelector::VisitSimd128Xor(Node* node) { UNIMPLEMENTED(); }
2239 2233
2240 void InstructionSelector::VisitSimd128Not(Node* node) { UNIMPLEMENTED(); } 2234 void InstructionSelector::VisitSimd128Not(Node* node) { UNIMPLEMENTED(); }
2235
2236 void InstructionSelector::VisitSimd32x4Select(Node* node) { UNIMPLEMENTED(); }
2237
2238 void InstructionSelector::VisitSimd16x8Select(Node* node) { UNIMPLEMENTED(); }
2239
2240 void InstructionSelector::VisitSimd8x16Select(Node* node) { UNIMPLEMENTED(); }
2241 #endif // !V8_TARGET_ARCH_ARM 2241 #endif // !V8_TARGET_ARCH_ARM
2242 2242
2243 void InstructionSelector::VisitFinishRegion(Node* node) { EmitIdentity(node); } 2243 void InstructionSelector::VisitFinishRegion(Node* node) { EmitIdentity(node); }
2244 2244
2245 void InstructionSelector::VisitParameter(Node* node) { 2245 void InstructionSelector::VisitParameter(Node* node) {
2246 OperandGenerator g(this); 2246 OperandGenerator g(this);
2247 int index = ParameterIndexOf(node->op()); 2247 int index = ParameterIndexOf(node->op());
2248 InstructionOperand op = 2248 InstructionOperand op =
2249 linkage()->ParameterHasSecondaryLocation(index) 2249 linkage()->ParameterHasSecondaryLocation(index)
2250 ? g.DefineAsDualLocation( 2250 ? g.DefineAsDualLocation(
(...skipping 360 matching lines...) Expand 10 before | Expand all | Expand 10 after
2611 return new (instruction_zone()) FrameStateDescriptor( 2611 return new (instruction_zone()) FrameStateDescriptor(
2612 instruction_zone(), state_info.type(), state_info.bailout_id(), 2612 instruction_zone(), state_info.type(), state_info.bailout_id(),
2613 state_info.state_combine(), parameters, locals, stack, 2613 state_info.state_combine(), parameters, locals, stack,
2614 state_info.shared_info(), outer_state); 2614 state_info.shared_info(), outer_state);
2615 } 2615 }
2616 2616
2617 2617
2618 } // namespace compiler 2618 } // namespace compiler
2619 } // namespace internal 2619 } // namespace internal
2620 } // namespace v8 2620 } // namespace v8
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