[V8] Implement SIMD Boolean vector types to allow mask registers.

src/arm64/assembler-arm64.h

 // Copyright 2013 the V8 project authors. All rights reserved.
 // Use of this source code is governed by a BSD-style license that can be
 // found in the LICENSE file.
 
 #ifndef V8_ARM64_ASSEMBLER_ARM64_H_
 #define V8_ARM64_ASSEMBLER_ARM64_H_
 
 #include <deque>
 #include <list>
 #include <map>
@@ skipping 180 matching lines @@
 
   static Register from_code(int code) {
     // Always return an X register.
     return Register::Create(code, kXRegSizeInBits);
   }
 
   // End of V8 compatibility section -----------------------
 };
 
 static const bool kSimpleFPAliasing = true;
+static const bool kSimdMaskRegisters = false;
 
 struct FPRegister : public CPURegister {
   enum Code {
 #define REGISTER_CODE(R) kCode_##R,
     DOUBLE_REGISTERS(REGISTER_CODE)
 #undef REGISTER_CODE
         kAfterLast,
     kCode_no_reg = -1
   };
 
@@ skipping 2019 matching lines @@
  public:
   explicit EnsureSpace(Assembler* assembler) {
     assembler->CheckBufferSpace();
   }
 };
 
 }  // namespace internal
 }  // namespace v8
 
 #endif  // V8_ARM64_ASSEMBLER_ARM64_H_