[V8] Implement SIMD Boolean vector types to allow mask registers.

src/arm/assembler-arm.h

 // Copyright (c) 1994-2006 Sun Microsystems Inc.
 // All Rights Reserved.
 //
 // Redistribution and use in source and binary forms, with or without
 // modification, are permitted provided that the following conditions
 // are met:
 //
 // - Redistributions of source code must retain the above copyright notice,
 // this list of conditions and the following disclaimer.
 //
@@ skipping 132 matching lines @@
 
 // r7: context register
 // r8: constant pool pointer register if FLAG_enable_embedded_constant_pool.
 // r9: lithium scratch
 #define DECLARE_REGISTER(R) const Register R = {Register::kCode_##R};
 GENERAL_REGISTERS(DECLARE_REGISTER)
 #undef DECLARE_REGISTER
 const Register no_reg = {Register::kCode_no_reg};
 
 static const bool kSimpleFPAliasing = false;
+static const bool kSimdMaskRegisters = false;
 
 // Single word VFP register.
 struct SwVfpRegister {
   enum Code {
 #define REGISTER_CODE(R) kCode_##R,
     FLOAT_REGISTERS(REGISTER_CODE)
 #undef REGISTER_CODE
         kAfterLast,
     kCode_no_reg = -1
   };
@@ skipping 1650 matching lines @@
   explicit EnsureSpace(Assembler* assembler) {
     assembler->CheckBuffer();
   }
 };
 
 
 }  // namespace internal
 }  // namespace v8
 
 #endif  // V8_ARM_ASSEMBLER_ARM_H_