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Issue 2696343002: s390: optimize for compares (Closed)
Patch Set: add todo Created 3 years, 10 months ago
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1 // Copyright (c) 1994-2006 Sun Microsystems Inc. 1 // Copyright (c) 1994-2006 Sun Microsystems Inc.
2 // All Rights Reserved. 2 // All Rights Reserved.
3 // 3 //
4 // Redistribution and use in source and binary forms, with or without 4 // Redistribution and use in source and binary forms, with or without
5 // modification, are permitted provided that the following conditions 5 // modification, are permitted provided that the following conditions
6 // are met: 6 // are met:
7 // 7 //
8 // - Redistributions of source code must retain the above copyright notice, 8 // - Redistributions of source code must retain the above copyright notice,
9 // this list of conditions and the following disclaimer. 9 // this list of conditions and the following disclaimer.
10 // 10 //
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1238 // 0 16 20 24 28 31 1238 // 0 16 20 24 28 31
1239 void Assembler::rrfe_form(Opcode op, Condition m3, Condition m4, Register r1, 1239 void Assembler::rrfe_form(Opcode op, Condition m3, Condition m4, Register r1,
1240 Register r2) { 1240 Register r2) {
1241 uint32_t code = op << 16 | m3 * B12 | m4 * B8 | r1.code() * B4 | r2.code(); 1241 uint32_t code = op << 16 | m3 * B12 | m4 * B8 | r1.code() * B4 | r2.code();
1242 emit4bytes(code); 1242 emit4bytes(code);
1243 } 1243 }
1244 1244
1245 // end of S390 Instruction generation 1245 // end of S390 Instruction generation
1246 1246
1247 // start of S390 instruction 1247 // start of S390 instruction
1248 RXE_FORM_EMIT(ceb, CEB)
1249 SS1_FORM_EMIT(ed, ED) 1248 SS1_FORM_EMIT(ed, ED)
1250 SS1_FORM_EMIT(mvn, MVN) 1249 SS1_FORM_EMIT(mvn, MVN)
1251 SS1_FORM_EMIT(nc, NC) 1250 SS1_FORM_EMIT(nc, NC)
1252 SI_FORM_EMIT(ni, NI) 1251 SI_FORM_EMIT(ni, NI)
1253 RI1_FORM_EMIT(nilh, NILH) 1252 RI1_FORM_EMIT(nilh, NILH)
1254 RI1_FORM_EMIT(nill, NILL) 1253 RI1_FORM_EMIT(nill, NILL)
1255 RI1_FORM_EMIT(oill, OILL) 1254 RI1_FORM_EMIT(oill, OILL)
1256 RI1_FORM_EMIT(tmll, TMLL) 1255 RI1_FORM_EMIT(tmll, TMLL)
1257 SS1_FORM_EMIT(tr, TR) 1256 SS1_FORM_EMIT(tr, TR)
1258 S_FORM_EMIT(ts, TS) 1257 S_FORM_EMIT(ts, TS)
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1841 rxe_form(MDB, Register::from_code(r1.code()), opnd.rb(), opnd.rx(), 1840 rxe_form(MDB, Register::from_code(r1.code()), opnd.rb(), opnd.rx(),
1842 opnd.offset()); 1841 opnd.offset());
1843 } 1842 }
1844 1843
1845 // Subtract Register-Storage (LB) 1844 // Subtract Register-Storage (LB)
1846 void Assembler::sdb(DoubleRegister r1, const MemOperand& opnd) { 1845 void Assembler::sdb(DoubleRegister r1, const MemOperand& opnd) {
1847 rxe_form(SDB, Register::from_code(r1.code()), opnd.rx(), opnd.rb(), 1846 rxe_form(SDB, Register::from_code(r1.code()), opnd.rx(), opnd.rb(),
1848 opnd.offset()); 1847 opnd.offset());
1849 } 1848 }
1850 1849
1850 void Assembler::ceb(DoubleRegister r1, const MemOperand& opnd) {
1851 rxe_form(CEB, Register::from_code(r1.code()), opnd.rx(), opnd.rb(),
1852 opnd.offset());
1853 }
1854
1855 void Assembler::cdb(DoubleRegister r1, const MemOperand& opnd) {
1856 rxe_form(CDB, Register::from_code(r1.code()), opnd.rx(), opnd.rb(),
1857 opnd.offset());
1858 }
1859
1851 // Square Root (LB) 1860 // Square Root (LB)
1852 void Assembler::sqdb(DoubleRegister r1, const MemOperand& opnd) { 1861 void Assembler::sqdb(DoubleRegister r1, const MemOperand& opnd) {
1853 rxe_form(SQDB, Register::from_code(r1.code()), opnd.rx(), opnd.rb(), 1862 rxe_form(SQDB, Register::from_code(r1.code()), opnd.rx(), opnd.rb(),
1854 opnd.offset()); 1863 opnd.offset());
1855 } 1864 }
1856 1865
1857 // Convert to Fixed point (64<-S) 1866 // Convert to Fixed point (64<-S)
1858 void Assembler::cgebr(Condition m, Register r1, DoubleRegister r2) { 1867 void Assembler::cgebr(Condition m, Register r1, DoubleRegister r2) {
1859 rrfe_form(CGEBR, m, Condition(0), r1, Register::from_code(r2.code())); 1868 rrfe_form(CGEBR, m, Condition(0), r1, Register::from_code(r2.code()));
1860 } 1869 }
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2098 SKIP_ICACHE_FLUSH); 2107 SKIP_ICACHE_FLUSH);
2099 } 2108 }
2100 2109
2101 reloc_info_writer.Write(&rinfo); 2110 reloc_info_writer.Write(&rinfo);
2102 } 2111 }
2103 } 2112 }
2104 2113
2105 } // namespace internal 2114 } // namespace internal
2106 } // namespace v8 2115 } // namespace v8
2107 #endif // V8_TARGET_ARCH_S390 2116 #endif // V8_TARGET_ARCH_S390
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