Add several SIMD opcodes to IA32

src/ia32/assembler-ia32.h

Index: src/ia32/assembler-ia32.h
diff --git a/src/ia32/assembler-ia32.h b/src/ia32/assembler-ia32.h
index 7ca50786922306522dcbaf1b655081d56c1dceee..c6029a08f7ecaca6b1a68d4d60ce080e9cebb933 100644
--- a/src/ia32/assembler-ia32.h
+++ b/src/ia32/assembler-ia32.h
@@ -1417,6 +1417,22 @@ class Assembler : public AssemblerBase {
   void vpd(byte op, XMMRegister dst, XMMRegister src1, XMMRegister src2);
   void vpd(byte op, XMMRegister dst, XMMRegister src1, const Operand& src2);
 
+// Other SSE and AVX instructions
+#define SSE2_INSTRUCTION_LIST(V) \
+  V(paddd, 66, 0F, FE)           \
+  V(psubd, 66, 0F, FA)
+
+#define DECLARE_SSE2_INSTRUCTION(instruction, prefix, escape, opcode) \
+  void instruction(XMMRegister dst, XMMRegister src) {                \
+    instruction(dst, Operand(src));                                   \
+  }                                                                   \
+  void instruction(XMMRegister dst, const Operand& src) {             \
+    sse2_instr(dst, src, 0x##prefix, 0x##escape, 0x##opcode);         \

[bbudge, 2017/02/18 00:02:25]

Rather than gluing the literals together here, could you declare them above?
I.e.

#define SSE2_INSTRUCTION_LIST(V) \
  V(paddd, 0x66, 0x0F, 0xFE)           \
  V(psubd, 0x66, 0x0F, 0xFA)

I think it's clearer and more consistent with style here.

[Jing, 2017/02/20 15:28:13]

Since the list is also used in DECLARE_SSE2_AVX_INSTRUCTION, where I use k66 and
k0F, is it OK to remain the literal gluing?

[bbudge, 2017/02/22 21:51:10]

In that case, this is OK.

+  }
+
+  SSE2_INSTRUCTION_LIST(DECLARE_SSE2_INSTRUCTION)
+#undef DECLARE_SSE2_INSTRUCTION
+
   // Prefetch src position into cache level.
   // Level 1, 2 or 3 specifies CPU cache level. Level 0 specifies a
   // non-temporal
@@ -1547,6 +1563,8 @@ class Assembler : public AssemblerBase {
   inline void emit_disp(Label* L, Displacement::Type type);
   inline void emit_near_disp(Label* L);
 
+  void sse2_instr(XMMRegister dst, const Operand& src, byte prefix, byte escape,
+                  byte opcode);
   // Most BMI instructions are similiar.
   void bmi1(byte op, Register reg, Register vreg, const Operand& rm);
   void bmi2(SIMDPrefix pp, byte op, Register reg, Register vreg,