Add several SIMD opcodes to IA32

src/compiler/ia32/code-generator-ia32.cc

Index: src/compiler/ia32/code-generator-ia32.cc
diff --git a/src/compiler/ia32/code-generator-ia32.cc b/src/compiler/ia32/code-generator-ia32.cc
index 0f6d1c3a4a8ff7db2ed2a07436e3a96e542bbe16..7243d621c3d210dff4dacc58f004e324fcc4e4b9 100644
--- a/src/compiler/ia32/code-generator-ia32.cc
+++ b/src/compiler/ia32/code-generator-ia32.cc
@@ -1614,10 +1614,10 @@ CodeGenerator::CodeGenResult CodeGenerator::AssembleArchInstruction(
       }
       break;
     case kSSEFloat64InsertLowWord32:
-      __ Pinsrd(i.OutputDoubleRegister(), i.InputOperand(1), 0);
+      __ Pinsrd(i.OutputDoubleRegister(), i.InputOperand(1), 0, true);
       break;
     case kSSEFloat64InsertHighWord32:
-      __ Pinsrd(i.OutputDoubleRegister(), i.InputOperand(1), 1);
+      __ Pinsrd(i.OutputDoubleRegister(), i.InputOperand(1), 1, true);
       break;
     case kSSEFloat64LoadLowWord32:
       __ movd(i.OutputDoubleRegister(), i.InputOperand(0));
@@ -1888,6 +1888,40 @@ CodeGenerator::CodeGenResult CodeGenerator::AssembleArchInstruction(
       }
       break;
     }
+    case kIA32Int32x4Splat: {
+      XMMRegister dst = i.OutputSimd128Register();
+      __ movd(dst, i.InputOperand(0));
+      __ pshufd(dst, dst, 0x0);
+      break;
+    }
+    case kIA32Int32x4ExtractLane: {
+      __ Pextrd(i.OutputRegister(), i.InputSimd128Register(0), i.InputInt8(1));
+      break;
+    }
+    case kIA32Int32x4ReplaceLane: {
+      __ Pinsrd(i.OutputSimd128Register(), i.InputOperand(2), i.InputInt8(1));
+      break;
+    }
+    case kSSEInt32x4Add: {
+      __ paddd(i.OutputSimd128Register(), i.InputOperand(1));
+      break;
+    }
+    case kSSEInt32x4Sub: {
+      __ psubd(i.OutputSimd128Register(), i.InputOperand(1));
+      break;
+    }
+    case kAVXInt32x4Add: {
+      CpuFeatureScope avx_scope(masm(), AVX);
+      __ vpaddd(i.OutputSimd128Register(), i.InputSimd128Register(0),
+                i.InputOperand(1));
+      break;
+    }
+    case kAVXInt32x4Sub: {
+      CpuFeatureScope avx_scope(masm(), AVX);
+      __ vpsubd(i.OutputSimd128Register(), i.InputSimd128Register(0),
+                i.InputOperand(1));
+      break;
+    }
     case kCheckedLoadInt8:
       ASSEMBLE_CHECKED_LOAD_INTEGER(movsx_b);
       break;