OLD | NEW |
1 // Copyright 2014 the V8 project authors. All rights reserved. | 1 // Copyright 2014 the V8 project authors. All rights reserved. |
2 // Use of this source code is governed by a BSD-style license that can be | 2 // Use of this source code is governed by a BSD-style license that can be |
3 // found in the LICENSE file. | 3 // found in the LICENSE file. |
4 | 4 |
5 #ifndef V8_COMPILER_IA32_INSTRUCTION_CODES_IA32_H_ | 5 #ifndef V8_COMPILER_IA32_INSTRUCTION_CODES_IA32_H_ |
6 #define V8_COMPILER_IA32_INSTRUCTION_CODES_IA32_H_ | 6 #define V8_COMPILER_IA32_INSTRUCTION_CODES_IA32_H_ |
7 | 7 |
8 namespace v8 { | 8 namespace v8 { |
9 namespace internal { | 9 namespace internal { |
10 namespace compiler { | 10 namespace compiler { |
(...skipping 95 matching lines...) Expand 10 before | Expand all | Expand 10 after Loading... |
106 V(IA32BitcastFI) \ | 106 V(IA32BitcastFI) \ |
107 V(IA32BitcastIF) \ | 107 V(IA32BitcastIF) \ |
108 V(IA32Lea) \ | 108 V(IA32Lea) \ |
109 V(IA32Push) \ | 109 V(IA32Push) \ |
110 V(IA32PushFloat32) \ | 110 V(IA32PushFloat32) \ |
111 V(IA32PushFloat64) \ | 111 V(IA32PushFloat64) \ |
112 V(IA32Poke) \ | 112 V(IA32Poke) \ |
113 V(IA32StackCheck) \ | 113 V(IA32StackCheck) \ |
114 V(IA32Xchgb) \ | 114 V(IA32Xchgb) \ |
115 V(IA32Xchgw) \ | 115 V(IA32Xchgw) \ |
116 V(IA32Xchgl) | 116 V(IA32Xchgl) \ |
| 117 V(IA32Int32x4Create) \ |
| 118 V(IA32Int32x4ExtractLane) \ |
| 119 V(IA32Int32x4ReplaceLane) \ |
| 120 V(IA32Int32x4Add) \ |
| 121 V(IA32Int32x4Sub) |
117 | 122 |
118 // Addressing modes represent the "shape" of inputs to an instruction. | 123 // Addressing modes represent the "shape" of inputs to an instruction. |
119 // Many instructions support multiple addressing modes. Addressing modes | 124 // Many instructions support multiple addressing modes. Addressing modes |
120 // are encoded into the InstructionCode of the instruction and tell the | 125 // are encoded into the InstructionCode of the instruction and tell the |
121 // code generator after register allocation which assembler method to call. | 126 // code generator after register allocation which assembler method to call. |
122 // | 127 // |
123 // We use the following local notation for addressing modes: | 128 // We use the following local notation for addressing modes: |
124 // | 129 // |
125 // M = memory operand | 130 // M = memory operand |
126 // R = base register | 131 // R = base register |
(...skipping 19 matching lines...) Expand all Loading... |
146 V(M2I) /* [ %r2*2 + K] */ \ | 151 V(M2I) /* [ %r2*2 + K] */ \ |
147 V(M4I) /* [ %r2*4 + K] */ \ | 152 V(M4I) /* [ %r2*4 + K] */ \ |
148 V(M8I) /* [ %r2*8 + K] */ \ | 153 V(M8I) /* [ %r2*8 + K] */ \ |
149 V(MI) /* [ K] */ | 154 V(MI) /* [ K] */ |
150 | 155 |
151 } // namespace compiler | 156 } // namespace compiler |
152 } // namespace internal | 157 } // namespace internal |
153 } // namespace v8 | 158 } // namespace v8 |
154 | 159 |
155 #endif // V8_COMPILER_IA32_INSTRUCTION_CODES_IA32_H_ | 160 #endif // V8_COMPILER_IA32_INSTRUCTION_CODES_IA32_H_ |
OLD | NEW |