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| 1 // Copyright 2014 the V8 project authors. All rights reserved. | 1 // Copyright 2014 the V8 project authors. All rights reserved. |
| 2 // Use of this source code is governed by a BSD-style license that can be | 2 // Use of this source code is governed by a BSD-style license that can be |
| 3 // found in the LICENSE file. | 3 // found in the LICENSE file. |
| 4 | 4 |
| 5 #ifndef V8_COMPILER_IA32_INSTRUCTION_CODES_IA32_H_ | 5 #ifndef V8_COMPILER_IA32_INSTRUCTION_CODES_IA32_H_ |
| 6 #define V8_COMPILER_IA32_INSTRUCTION_CODES_IA32_H_ | 6 #define V8_COMPILER_IA32_INSTRUCTION_CODES_IA32_H_ |
| 7 | 7 |
| 8 namespace v8 { | 8 namespace v8 { |
| 9 namespace internal { | 9 namespace internal { |
| 10 namespace compiler { | 10 namespace compiler { |
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| 103 V(IA32Movl) \ | 103 V(IA32Movl) \ |
| 104 V(IA32Movss) \ | 104 V(IA32Movss) \ |
| 105 V(IA32Movsd) \ | 105 V(IA32Movsd) \ |
| 106 V(IA32BitcastFI) \ | 106 V(IA32BitcastFI) \ |
| 107 V(IA32BitcastIF) \ | 107 V(IA32BitcastIF) \ |
| 108 V(IA32Lea) \ | 108 V(IA32Lea) \ |
| 109 V(IA32Push) \ | 109 V(IA32Push) \ |
| 110 V(IA32PushFloat32) \ | 110 V(IA32PushFloat32) \ |
| 111 V(IA32PushFloat64) \ | 111 V(IA32PushFloat64) \ |
| 112 V(IA32Poke) \ | 112 V(IA32Poke) \ |
| 113 V(IA32StackCheck) | 113 V(IA32StackCheck) \ |
| 114 V(IA32Int32x4Splat) \ |
| 115 V(IA32Int32x4ExtractLane) \ |
| 116 V(IA32Int32x4ReplaceLane) \ |
| 117 V(SSEInt32x4Add) \ |
| 118 V(SSEInt32x4Sub) \ |
| 119 V(AVXInt32x4Add) \ |
| 120 V(AVXInt32x4Sub) |
| 114 | 121 |
| 115 // Addressing modes represent the "shape" of inputs to an instruction. | 122 // Addressing modes represent the "shape" of inputs to an instruction. |
| 116 // Many instructions support multiple addressing modes. Addressing modes | 123 // Many instructions support multiple addressing modes. Addressing modes |
| 117 // are encoded into the InstructionCode of the instruction and tell the | 124 // are encoded into the InstructionCode of the instruction and tell the |
| 118 // code generator after register allocation which assembler method to call. | 125 // code generator after register allocation which assembler method to call. |
| 119 // | 126 // |
| 120 // We use the following local notation for addressing modes: | 127 // We use the following local notation for addressing modes: |
| 121 // | 128 // |
| 122 // M = memory operand | 129 // M = memory operand |
| 123 // R = base register | 130 // R = base register |
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| 143 V(M2I) /* [ %r2*2 + K] */ \ | 150 V(M2I) /* [ %r2*2 + K] */ \ |
| 144 V(M4I) /* [ %r2*4 + K] */ \ | 151 V(M4I) /* [ %r2*4 + K] */ \ |
| 145 V(M8I) /* [ %r2*8 + K] */ \ | 152 V(M8I) /* [ %r2*8 + K] */ \ |
| 146 V(MI) /* [ K] */ | 153 V(MI) /* [ K] */ |
| 147 | 154 |
| 148 } // namespace compiler | 155 } // namespace compiler |
| 149 } // namespace internal | 156 } // namespace internal |
| 150 } // namespace v8 | 157 } // namespace v8 |
| 151 | 158 |
| 152 #endif // V8_COMPILER_IA32_INSTRUCTION_CODES_IA32_H_ | 159 #endif // V8_COMPILER_IA32_INSTRUCTION_CODES_IA32_H_ |
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