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Side by Side Diff: src/ia32/assembler-ia32.h

Issue 2695613004: Add several SIMD opcodes to IA32 (Closed)
Patch Set: Fix debug test Created 3 years, 10 months ago
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1 // Copyright (c) 1994-2006 Sun Microsystems Inc. 1 // Copyright (c) 1994-2006 Sun Microsystems Inc.
2 // All Rights Reserved. 2 // All Rights Reserved.
3 // 3 //
4 // Redistribution and use in source and binary forms, with or without 4 // Redistribution and use in source and binary forms, with or without
5 // modification, are permitted provided that the following conditions are 5 // modification, are permitted provided that the following conditions are
6 // met: 6 // met:
7 // 7 //
8 // - Redistributions of source code must retain the above copyright notice, 8 // - Redistributions of source code must retain the above copyright notice,
9 // this list of conditions and the following disclaimer. 9 // this list of conditions and the following disclaimer.
10 // 10 //
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33 // Copyright 2011 the V8 project authors. All rights reserved. 33 // Copyright 2011 the V8 project authors. All rights reserved.
34 34
35 // A light-weight IA32 Assembler. 35 // A light-weight IA32 Assembler.
36 36
37 #ifndef V8_IA32_ASSEMBLER_IA32_H_ 37 #ifndef V8_IA32_ASSEMBLER_IA32_H_
38 #define V8_IA32_ASSEMBLER_IA32_H_ 38 #define V8_IA32_ASSEMBLER_IA32_H_
39 39
40 #include <deque> 40 #include <deque>
41 41
42 #include "src/assembler.h" 42 #include "src/assembler.h"
43 #include "src/ia32/sse-instr.h"
43 #include "src/isolate.h" 44 #include "src/isolate.h"
44 #include "src/utils.h" 45 #include "src/utils.h"
45 46
46 namespace v8 { 47 namespace v8 {
47 namespace internal { 48 namespace internal {
48 49
49 #define GENERAL_REGISTERS(V) \ 50 #define GENERAL_REGISTERS(V) \
50 V(eax) \ 51 V(eax) \
51 V(ecx) \ 52 V(ecx) \
52 V(edx) \ 53 V(edx) \
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973 void addps(XMMRegister dst, const Operand& src); 974 void addps(XMMRegister dst, const Operand& src);
974 void addps(XMMRegister dst, XMMRegister src) { addps(dst, Operand(src)); } 975 void addps(XMMRegister dst, XMMRegister src) { addps(dst, Operand(src)); }
975 void subps(XMMRegister dst, const Operand& src); 976 void subps(XMMRegister dst, const Operand& src);
976 void subps(XMMRegister dst, XMMRegister src) { subps(dst, Operand(src)); } 977 void subps(XMMRegister dst, XMMRegister src) { subps(dst, Operand(src)); }
977 void mulps(XMMRegister dst, const Operand& src); 978 void mulps(XMMRegister dst, const Operand& src);
978 void mulps(XMMRegister dst, XMMRegister src) { mulps(dst, Operand(src)); } 979 void mulps(XMMRegister dst, XMMRegister src) { mulps(dst, Operand(src)); }
979 void divps(XMMRegister dst, const Operand& src); 980 void divps(XMMRegister dst, const Operand& src);
980 void divps(XMMRegister dst, XMMRegister src) { divps(dst, Operand(src)); } 981 void divps(XMMRegister dst, XMMRegister src) { divps(dst, Operand(src)); }
981 982
982 // SSE2 instructions 983 // SSE2 instructions
984 void sse2_instr(XMMRegister dst, const Operand& src, byte prefix, byte escape,
985 byte opcode);
bbudge 2017/02/15 16:00:12 This should probably be either private, or even be
bbudge 2017/02/15 16:07:31 Looking at the implementation, this has to be a cl
Jing 2017/02/16 05:11:17 Done.
986 #define DECLARE_SSE2_INSTRUCTION(instruction, prefix, escape, opcode) \
987 void instruction(XMMRegister dst, XMMRegister src) { \
988 instruction(dst, Operand(src)); \
989 } \
990 void instruction(XMMRegister dst, const Operand& src) { \
991 sse2_instr(dst, src, 0x##prefix, 0x##escape, 0x##opcode); \
992 }
993
994 SSE2_INSTRUCTION_LIST(DECLARE_SSE2_INSTRUCTION)
bbudge 2017/02/15 16:00:12 I think it would be more readable if SSE2_INSTRUCT
Jing 2017/02/16 05:11:17 I ported the header file from x64 and planned to e
bbudge 2017/02/17 00:44:40 I think it's more consistent with V8 style to inli
Jing 2017/02/17 03:51:35 Done.
Jing 2017/02/20 15:28:13 Sorry, I recover the separate header file again, b
bbudge 2017/02/22 21:51:09 OK, I see the precedent in x64.
995 #undef DECLARE_SSE2_INSTRUCTION
996
983 void cvttss2si(Register dst, const Operand& src); 997 void cvttss2si(Register dst, const Operand& src);
984 void cvttss2si(Register dst, XMMRegister src) { 998 void cvttss2si(Register dst, XMMRegister src) {
985 cvttss2si(dst, Operand(src)); 999 cvttss2si(dst, Operand(src));
986 } 1000 }
987 void cvttsd2si(Register dst, const Operand& src); 1001 void cvttsd2si(Register dst, const Operand& src);
988 void cvttsd2si(Register dst, XMMRegister src) { 1002 void cvttsd2si(Register dst, XMMRegister src) {
989 cvttsd2si(dst, Operand(src)); 1003 cvttsd2si(dst, Operand(src));
990 } 1004 }
991 void cvtsd2si(Register dst, XMMRegister src); 1005 void cvtsd2si(Register dst, XMMRegister src);
992 1006
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1077 void pshufd(XMMRegister dst, XMMRegister src, uint8_t shuffle); 1091 void pshufd(XMMRegister dst, XMMRegister src, uint8_t shuffle);
1078 void pextrd(Register dst, XMMRegister src, int8_t offset) { 1092 void pextrd(Register dst, XMMRegister src, int8_t offset) {
1079 pextrd(Operand(dst), src, offset); 1093 pextrd(Operand(dst), src, offset);
1080 } 1094 }
1081 void pextrd(const Operand& dst, XMMRegister src, int8_t offset); 1095 void pextrd(const Operand& dst, XMMRegister src, int8_t offset);
1082 void pinsrd(XMMRegister dst, Register src, int8_t offset) { 1096 void pinsrd(XMMRegister dst, Register src, int8_t offset) {
1083 pinsrd(dst, Operand(src), offset); 1097 pinsrd(dst, Operand(src), offset);
1084 } 1098 }
1085 void pinsrd(XMMRegister dst, const Operand& src, int8_t offset); 1099 void pinsrd(XMMRegister dst, const Operand& src, int8_t offset);
1086 1100
1087 // AVX instructions 1101 // AVX instructions
bbudge 2017/02/15 16:07:31 Is there a plan to use AVX if it's available?
1088 void vfmadd132sd(XMMRegister dst, XMMRegister src1, XMMRegister src2) { 1102 void vfmadd132sd(XMMRegister dst, XMMRegister src1, XMMRegister src2) {
1089 vfmadd132sd(dst, src1, Operand(src2)); 1103 vfmadd132sd(dst, src1, Operand(src2));
1090 } 1104 }
1091 void vfmadd213sd(XMMRegister dst, XMMRegister src1, XMMRegister src2) { 1105 void vfmadd213sd(XMMRegister dst, XMMRegister src1, XMMRegister src2) {
1092 vfmadd213sd(dst, src1, Operand(src2)); 1106 vfmadd213sd(dst, src1, Operand(src2));
1093 } 1107 }
1094 void vfmadd231sd(XMMRegister dst, XMMRegister src1, XMMRegister src2) { 1108 void vfmadd231sd(XMMRegister dst, XMMRegister src1, XMMRegister src2) {
1095 vfmadd231sd(dst, src1, Operand(src2)); 1109 vfmadd231sd(dst, src1, Operand(src2));
1096 } 1110 }
1097 void vfmadd132sd(XMMRegister dst, XMMRegister src1, const Operand& src2) { 1111 void vfmadd132sd(XMMRegister dst, XMMRegister src1, const Operand& src2) {
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1592 Assembler* assembler_; 1606 Assembler* assembler_;
1593 #ifdef DEBUG 1607 #ifdef DEBUG
1594 int space_before_; 1608 int space_before_;
1595 #endif 1609 #endif
1596 }; 1610 };
1597 1611
1598 } // namespace internal 1612 } // namespace internal
1599 } // namespace v8 1613 } // namespace v8
1600 1614
1601 #endif // V8_IA32_ASSEMBLER_IA32_H_ 1615 #endif // V8_IA32_ASSEMBLER_IA32_H_
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