Move cache line size calculation directly into CPU::FlushICache.

Move cache line size calculation directly into CPU::FlushICache.

This disentagles the initialization/dependency mess quite a bit and
makes things vastly simpler. If the 'mrs' on every flush is too
expensive (which it is hopefully not), the cache line sizes will have
to be instance variables of the CPU class and FlushICache will have to
be a member function. This would involve some more or less tricky
refactorings, which we shouldn't do until we are *really* forced to
do.

BUG=359977
LOG=y
R=rodolph.perfetta@gmail.com

Committed: https://code.google.com/p/v8/source/detail?r=21119

[Rodolph Perfetta, 2014-05-02 12:28:11]

lgtm.

You may have to give the review to my arm address for the lgtm to count.

[Sven Panne, 2014-05-02 12:35:57]

Committed patchset #3 manually as r21119 (presubmit successful).

[Rodolph Perfetta, 2014-05-02 13:12:07]

https://codereview.chromium.org/269543016/diff/40001/src/arm64/cpu-arm64.cc
File src/arm64/cpu-arm64.cc (right):

https://codereview.chromium.org/269543016/diff/40001/src/arm64/cpu-arm64.cc#n...
src/arm64/cpu-arm64.cc:42: return 1 << ((cache_type_register_ >>
cache_line_size_shift) & 0xf);
Argh, the original code was wrong (my bad), the size is in words not bytes so a
further shift by 2 is required to get the size in bytes.

In practice this has no bad side effects as we do more cache operations than
required and the result will be the same.

Sorry for not spotting it earlier.

[Sven Panne, 2014-05-05 07:57:33]

https://codereview.chromium.org/269543016/diff/40001/src/arm64/cpu-arm64.cc
File src/arm64/cpu-arm64.cc (right):

https://codereview.chromium.org/269543016/diff/40001/src/arm64/cpu-arm64.cc#n...
src/arm64/cpu-arm64.cc:42: return 1 << ((cache_type_register_ >>
cache_line_size_shift) & 0xf);
On 2014/05/02 13:12:07, Rodolph Perfetta wrote:
> Argh, the original code was wrong (my bad), the size is in words not bytes so
a
> further shift by 2 is required to get the size in bytes.
> 
> In practice this has no bad side effects as we do more cache operations than
> required and the result will be the same.
> 
> Sorry for not spotting it earlier.

So the "1 << ..." should be replaced by a "4 << ..." (and the comment should be
improved)? Could you prepare a CL?

[Rodolph Perfetta, 2014-05-06 17:42:27]

On 2014/05/05 07:57:33, Sven Panne wrote:
> https://codereview.chromium.org/269543016/diff/40001/src/arm64/cpu-arm64.cc
> File src/arm64/cpu-arm64.cc (right):
> 
>
https://codereview.chromium.org/269543016/diff/40001/src/arm64/cpu-arm64.cc#n...
> src/arm64/cpu-arm64.cc:42: return 1 << ((cache_type_register_ >>
> cache_line_size_shift) & 0xf);
> On 2014/05/02 13:12:07, Rodolph Perfetta wrote:
> > Argh, the original code was wrong (my bad), the size is in words not bytes
so
> a
> > further shift by 2 is required to get the size in bytes.
> > 
> > In practice this has no bad side effects as we do more cache operations than
> > required and the result will be the same.
> > 
> > Sorry for not spotting it earlier.
> 
> So the "1 << ..." should be replaced by a "4 << ..." (and the comment should
be
> improved)? Could you prepare a CL?

Done: https://codereview.chromium.org/268673020/