Only assume that we have 32 D registers on ARMv7-a.

runtime/vm/assembler_arm.cc

 // Copyright (c) 2013, the Dart project authors.  Please see the AUTHORS file
 // for details. All rights reserved. Use of this source code is governed by a
 // BSD-style license that can be found in the LICENSE file.
 
 #include "vm/globals.h"
 #if defined(TARGET_ARCH_ARM)
 
 #include "vm/assembler.h"
 #include "vm/cpu.h"
 #include "vm/longjump.h"
@@ skipping 883 matching lines @@
   EmitVFPsss(cond, B23 | B21 | B20 | B6, sd, S0, sm);
 }
 
 
 void Assembler::vmovd(DRegister dd, DRegister dm, Condition cond) {
   EmitVFPddd(cond, B23 | B21 | B20 | B6, dd, D0, dm);
 }
 
 
 bool Assembler::vmovs(SRegister sd, float s_imm, Condition cond) {
+  if (TargetCPUFeatures::arm_version() != ARMv7) {
+    return false;
+  }
   uint32_t imm32 = bit_cast<uint32_t, float>(s_imm);
   if (((imm32 & ((1 << 19) - 1)) == 0) &&
       ((((imm32 >> 25) & ((1 << 6) - 1)) == (1 << 5)) ||
        (((imm32 >> 25) & ((1 << 6) - 1)) == ((1 << 5) -1)))) {
     uint8_t imm8 = ((imm32 >> 31) << 7) | (((imm32 >> 29) & 1) << 6) |
         ((imm32 >> 19) & ((1 << 6) -1));
     EmitVFPsss(cond, B23 | B21 | B20 | ((imm8 >> 4)*B16) | (imm8 & 0xf),
                sd, S0, S0);
     return true;
   }
   return false;
 }
 
 
 bool Assembler::vmovd(DRegister dd, double d_imm, Condition cond) {
+  if (TargetCPUFeatures::arm_version() != ARMv7) {
+    return false;
+  }
   uint64_t imm64 = bit_cast<uint64_t, double>(d_imm);
   if (((imm64 & ((1LL << 48) - 1)) == 0) &&
       ((((imm64 >> 54) & ((1 << 9) - 1)) == (1 << 8)) ||
        (((imm64 >> 54) & ((1 << 9) - 1)) == ((1 << 8) -1)))) {
     uint8_t imm8 = ((imm64 >> 63) << 7) | (((imm64 >> 61) & 1) << 6) |
         ((imm64 >> 48) & ((1 << 6) -1));
     EmitVFPddd(cond, B23 | B21 | B20 | ((imm8 >> 4)*B16) | B8 | (imm8 & 0xf),
                dd, D0, D0);
     return true;
   }
@@ skipping 2093 matching lines @@
 
 
 const char* Assembler::FpuRegisterName(FpuRegister reg) {
   ASSERT((0 <= reg) && (reg < kNumberOfFpuRegisters));
   return fpu_reg_names[reg];
 }
 
 }  // namespace dart
 
 #endif  // defined TARGET_ARCH_ARM