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Side by Side Diff: runtime/vm/assembler_arm64_test.cc

Issue 269343010: Adds single-precision and SIMD load/store to arm64. (Closed) Base URL: http://dart.googlecode.com/svn/branches/bleeding_edge/dart/
Patch Set: Created 6 years, 7 months ago
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1 // Copyright (c) 2013, the Dart project authors. Please see the AUTHORS file 1 // Copyright (c) 2013, the Dart project authors. Please see the AUTHORS file
2 // for details. All rights reserved. Use of this source code is governed by a 2 // for details. All rights reserved. Use of this source code is governed by a
3 // BSD-style license that can be found in the LICENSE file. 3 // BSD-style license that can be found in the LICENSE file.
4 4
5 #include "vm/globals.h" 5 #include "vm/globals.h"
6 #if defined(TARGET_ARCH_ARM64) 6 #if defined(TARGET_ARCH_ARM64)
7 7
8 #include "vm/assembler.h" 8 #include "vm/assembler.h"
9 #include "vm/cpu.h" 9 #include "vm/cpu.h"
10 #include "vm/os.h" 10 #include "vm/os.h"
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1544 __ ret(); 1544 __ ret();
1545 } 1545 }
1546 1546
1547 1547
1548 ASSEMBLER_TEST_RUN(FldrdFstrdPrePostIndex, test) { 1548 ASSEMBLER_TEST_RUN(FldrdFstrdPrePostIndex, test) {
1549 typedef int (*SimpleCode)(); 1549 typedef int (*SimpleCode)();
1550 EXPECT_EQ(42.0, EXECUTE_TEST_CODE_DOUBLE(SimpleCode, test->entry())); 1550 EXPECT_EQ(42.0, EXECUTE_TEST_CODE_DOUBLE(SimpleCode, test->entry()));
1551 } 1551 }
1552 1552
1553 1553
1554 ASSEMBLER_TEST_GENERATE(FldrsFstrsPrePostIndex, assembler) {
1555 __ LoadDImmediate(V1, 42.0, kNoPP);
1556 __ fcvtsd(V2, V1);
1557 __ fstrs(V2, Address(SP, -1*kWordSize, Address::PreIndex));
1558 __ fldrs(V3, Address(SP, 1*kWordSize, Address::PostIndex));
1559 __ fcvtds(V0, V3);
1560 __ ret();
1561 }
1562
1563
1564 ASSEMBLER_TEST_RUN(FldrsFstrsPrePostIndex, test) {
1565 typedef int (*SimpleCode)();
1566 EXPECT_EQ(42.0, EXECUTE_TEST_CODE_DOUBLE(SimpleCode, test->entry()));
1567 }
1568
1569
1570 ASSEMBLER_TEST_GENERATE(FldrqFstrqPrePostIndex, assembler) {
1571 __ LoadDImmediate(V1, 21.0, kNoPP);
1572 __ LoadDImmediate(V2, 21.0, kNoPP);
1573 __ LoadImmediate(R1, 42, kNoPP);
1574 __ Push(R1);
1575 __ PushDouble(V1);
1576 __ PushDouble(V2);
1577 __ fldrq(V3, Address(SP, 2 * kWordSize, Address::PostIndex));
1578 __ Pop(R0);
1579 __ fstrq(V3, Address(SP, -2 * kWordSize, Address::PreIndex));
1580 __ PopDouble(V0);
1581 __ PopDouble(V1);
1582 __ faddd(V0, V0, V1);
1583 __ ret();
1584 }
1585
1586
1587 ASSEMBLER_TEST_RUN(FldrqFstrqPrePostIndex, test) {
1588 typedef int (*SimpleCode)();
1589 EXPECT_EQ(42.0, EXECUTE_TEST_CODE_DOUBLE(SimpleCode, test->entry()));
1590 }
1591
1592
1554 ASSEMBLER_TEST_GENERATE(Fcvtzds, assembler) { 1593 ASSEMBLER_TEST_GENERATE(Fcvtzds, assembler) {
1555 __ LoadDImmediate(V0, 42.0, kNoPP); 1594 __ LoadDImmediate(V0, 42.0, kNoPP);
1556 __ fcvtzds(R0, V0); 1595 __ fcvtzds(R0, V0);
1557 __ ret(); 1596 __ ret();
1558 } 1597 }
1559 1598
1560 1599
1561 ASSEMBLER_TEST_RUN(Fcvtzds, test) { 1600 ASSEMBLER_TEST_RUN(Fcvtzds, test) {
1562 typedef int (*SimpleCode)(); 1601 typedef int (*SimpleCode)();
1563 EXPECT_EQ(42, EXECUTE_TEST_CODE_INT64(SimpleCode, test->entry())); 1602 EXPECT_EQ(42, EXECUTE_TEST_CODE_INT64(SimpleCode, test->entry()));
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1808 R1); 1847 R1);
1809 __ Pop(LR); 1848 __ Pop(LR);
1810 __ Pop(CTX); 1849 __ Pop(CTX);
1811 __ PopAndUntagPP(); 1850 __ PopAndUntagPP();
1812 __ ret(); 1851 __ ret();
1813 } 1852 }
1814 1853
1815 } // namespace dart 1854 } // namespace dart
1816 1855
1817 #endif // defined(TARGET_ARCH_ARM64) 1856 #endif // defined(TARGET_ARCH_ARM64)
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