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1 // Copyright 2014 the V8 project authors. All rights reserved. | 1 // Copyright 2014 the V8 project authors. All rights reserved. |
2 // Use of this source code is governed by a BSD-style license that can be | 2 // Use of this source code is governed by a BSD-style license that can be |
3 // found in the LICENSE file. | 3 // found in the LICENSE file. |
4 | 4 |
5 #ifndef V8_S390_MACRO_ASSEMBLER_S390_H_ | 5 #ifndef V8_S390_MACRO_ASSEMBLER_S390_H_ |
6 #define V8_S390_MACRO_ASSEMBLER_S390_H_ | 6 #define V8_S390_MACRO_ASSEMBLER_S390_H_ |
7 | 7 |
8 #include "src/assembler.h" | 8 #include "src/assembler.h" |
9 #include "src/bailout-reason.h" | 9 #include "src/bailout-reason.h" |
10 #include "src/frames.h" | 10 #include "src/frames.h" |
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329 void MulHighU32(Register dst, Register src1, Register src2); | 329 void MulHighU32(Register dst, Register src1, Register src2); |
330 void MulHighU32(Register dst, Register src1, const Operand& src2); | 330 void MulHighU32(Register dst, Register src1, const Operand& src2); |
331 void Mul32WithOverflowIfCCUnequal(Register dst, Register src1, | 331 void Mul32WithOverflowIfCCUnequal(Register dst, Register src1, |
332 const MemOperand& src2); | 332 const MemOperand& src2); |
333 void Mul32WithOverflowIfCCUnequal(Register dst, Register src1, Register src2); | 333 void Mul32WithOverflowIfCCUnequal(Register dst, Register src1, Register src2); |
334 void Mul32WithOverflowIfCCUnequal(Register dst, Register src1, | 334 void Mul32WithOverflowIfCCUnequal(Register dst, Register src1, |
335 const Operand& src2); | 335 const Operand& src2); |
336 void Mul64(Register dst, const MemOperand& src1); | 336 void Mul64(Register dst, const MemOperand& src1); |
337 void Mul64(Register dst, Register src1); | 337 void Mul64(Register dst, Register src1); |
338 void Mul64(Register dst, const Operand& src1); | 338 void Mul64(Register dst, const Operand& src1); |
| 339 void MulPWithCondition(Register dst, Register src1, Register src2); |
339 | 340 |
340 // Divide | 341 // Divide |
341 void DivP(Register dividend, Register divider); | 342 void DivP(Register dividend, Register divider); |
342 void Div32(Register dst, Register src1, const MemOperand& src2); | 343 void Div32(Register dst, Register src1, const MemOperand& src2); |
343 void Div32(Register dst, Register src1, Register src2); | 344 void Div32(Register dst, Register src1, Register src2); |
344 void Div32(Register dst, Register src1, const Operand& src2); | 345 void Div32(Register dst, Register src1, const Operand& src2); |
345 void DivU32(Register dst, Register src1, const MemOperand& src2); | 346 void DivU32(Register dst, Register src1, const MemOperand& src2); |
346 void DivU32(Register dst, Register src1, Register src2); | 347 void DivU32(Register dst, Register src1, Register src2); |
347 void DivU32(Register dst, Register src1, const Operand& src2); | 348 void DivU32(Register dst, Register src1, const Operand& src2); |
348 | 349 |
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1849 inline MemOperand NativeContextMemOperand() { | 1850 inline MemOperand NativeContextMemOperand() { |
1850 return ContextMemOperand(cp, Context::NATIVE_CONTEXT_INDEX); | 1851 return ContextMemOperand(cp, Context::NATIVE_CONTEXT_INDEX); |
1851 } | 1852 } |
1852 | 1853 |
1853 #define ACCESS_MASM(masm) masm-> | 1854 #define ACCESS_MASM(masm) masm-> |
1854 | 1855 |
1855 } // namespace internal | 1856 } // namespace internal |
1856 } // namespace v8 | 1857 } // namespace v8 |
1857 | 1858 |
1858 #endif // V8_S390_MACRO_ASSEMBLER_S390_H_ | 1859 #endif // V8_S390_MACRO_ASSEMBLER_S390_H_ |
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