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Issue 268673003: ARM64: Optimize generated code for gaps (Closed) Base URL: https://v8.googlecode.com/svn/branches/bleeding_edge
Patch Set: reset scratch register value when acquired Created 6 years, 6 months ago
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1 // Copyright 2013 the V8 project authors. All rights reserved. 1 // Copyright 2013 the V8 project authors. All rights reserved.
2 // 2 //
3 // Redistribution and use in source and binary forms, with or without 3 // Redistribution and use in source and binary forms, with or without
4 // modification, are permitted provided that the following conditions are 4 // modification, are permitted provided that the following conditions are
5 // met: 5 // met:
6 // 6 //
7 // * Redistributions of source code must retain the above copyright 7 // * Redistributions of source code must retain the above copyright
8 // notice, this list of conditions and the following disclaimer. 8 // notice, this list of conditions and the following disclaimer.
9 // * Redistributions in binary form must reproduce the above 9 // * Redistributions in binary form must reproduce the above
10 // copyright notice, this list of conditions and the following 10 // copyright notice, this list of conditions and the following
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289 RelocInfo::Mode rmode = immediate_.rmode(); 289 RelocInfo::Mode rmode = immediate_.rmode();
290 290
291 if (rmode == RelocInfo::EXTERNAL_REFERENCE) { 291 if (rmode == RelocInfo::EXTERNAL_REFERENCE) {
292 return assembler->serializer_enabled(); 292 return assembler->serializer_enabled();
293 } 293 }
294 294
295 return !RelocInfo::IsNone(rmode); 295 return !RelocInfo::IsNone(rmode);
296 } 296 }
297 297
298 298
299 MemOperand::PairResult MemOperand::AreConsistentForPair(
300 const MemOperand& operandA,
301 const MemOperand& operandB,
302 int access_size_log2) {
303 ASSERT(access_size_log2 >= 0);
304 ASSERT(access_size_log2 <= 3);
305 // Step one: check that they share the same base, that the mode is Offset
306 // and that the offset is a multiple of access size.
307 if (!operandA.base().Is(operandB.base()) ||
308 (operandA.addrmode() != Offset) ||
309 (operandB.addrmode() != Offset) ||
310 ((operandA.offset() & ((1 << access_size_log2) - 1)) != 0)) {
311 return kNotPair;
312 }
313 // Step two: check that the offsets are contiguous and that the range
314 // is OK for ldp/stp.
315 if ((operandB.offset() == operandA.offset() + (1 << access_size_log2)) &&
316 is_int7(operandA.offset() >> access_size_log2)) {
317 return kPairAB;
318 }
319 if ((operandA.offset() == operandB.offset() + (1 << access_size_log2)) &&
320 is_int7(operandB.offset() >> access_size_log2)) {
321 return kPairBA;
322 }
323 return kNotPair;
324 }
325
326
299 // Assembler 327 // Assembler
300 328
301 Assembler::Assembler(Isolate* isolate, void* buffer, int buffer_size) 329 Assembler::Assembler(Isolate* isolate, void* buffer, int buffer_size)
302 : AssemblerBase(isolate, buffer, buffer_size), 330 : AssemblerBase(isolate, buffer, buffer_size),
303 recorded_ast_id_(TypeFeedbackId::None()), 331 recorded_ast_id_(TypeFeedbackId::None()),
304 unresolved_branches_(), 332 unresolved_branches_(),
305 positions_recorder_(this) { 333 positions_recorder_(this) {
306 const_pool_blocked_nesting_ = 0; 334 const_pool_blocked_nesting_ = 0;
307 veneer_pool_blocked_nesting_ = 0; 335 veneer_pool_blocked_nesting_ = 0;
308 Reset(); 336 Reset();
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2883 adr(rd, 0); 2911 adr(rd, 0);
2884 MovInt64(scratch, target_offset); 2912 MovInt64(scratch, target_offset);
2885 add(rd, rd, scratch); 2913 add(rd, rd, scratch);
2886 } 2914 }
2887 } 2915 }
2888 2916
2889 2917
2890 } } // namespace v8::internal 2918 } } // namespace v8::internal
2891 2919
2892 #endif // V8_TARGET_ARCH_ARM64 2920 #endif // V8_TARGET_ARCH_ARM64
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