ARM64: Optimize generated code for gaps

src/arm64/assembler-arm64.h

 // Copyright 2013 the V8 project authors. All rights reserved.
 // Use of this source code is governed by a BSD-style license that can be
 // found in the LICENSE file.
 
 #ifndef V8_ARM64_ASSEMBLER_ARM64_H_
 #define V8_ARM64_ASSEMBLER_ARM64_H_
 
 #include <list>
 #include <map>
 
@@ skipping 689 matching lines @@
   unsigned shift_amount() const { return shift_amount_; }
   inline bool IsImmediateOffset() const;
   inline bool IsRegisterOffset() const;
   inline bool IsPreIndex() const;
   inline bool IsPostIndex() const;
 
   // For offset modes, return the offset as an Operand. This helper cannot
   // handle indexed modes.
   inline Operand OffsetAsOperand() const;
 
+  enum PairResult {
+    kNotPair,   // Can't use a pair instruction.
+    kPairAB,    // Can use a pair instruction (operandA has lower address).
+    kPairBA };  // Can use a pair instruction (operandB has lower address).

[ulan, 2014/06/04 09:28:19]

Nit: "};" should be in a separate line.

[vincent.belliard, 2014/06/09 10:31:15]

Done.

+  // Check if two MemOperand are consistent for stp/ldp use.
+  static PairResult AreConsistentForPair(const MemOperand& operandA,
+                                         const MemOperand& operandB,
+                                         int access_size_log2 = kXRegSizeLog2);
+
  private:
   Register base_;
   Register regoffset_;
   ptrdiff_t offset_;
   AddrMode addrmode_;
   Shift shift_;
   Extend extend_;
   unsigned shift_amount_;
 };
 
@@ skipping 1518 matching lines @@
 class EnsureSpace BASE_EMBEDDED {
  public:
   explicit EnsureSpace(Assembler* assembler) {
     assembler->CheckBufferSpace();
   }
 };
 
 } }  // namespace v8::internal
 
 #endif  // V8_ARM64_ASSEMBLER_ARM64_H_