ARM64: Optimize generated code for gaps

src/arm64/assembler-arm64.cc

 // Copyright 2013 the V8 project authors. All rights reserved.
 //
 // Redistribution and use in source and binary forms, with or without
 // modification, are permitted provided that the following conditions are
 // met:
 //
 //     * Redistributions of source code must retain the above copyright
 //       notice, this list of conditions and the following disclaimer.
 //     * Redistributions in binary form must reproduce the above
 //       copyright notice, this list of conditions and the following
@@ skipping 276 matching lines @@
 
 bool Operand::NeedsRelocation(const Assembler* assembler) const {
   if (rmode_ == RelocInfo::EXTERNAL_REFERENCE) {
     return assembler->serializer_enabled();
   }
 
   return !RelocInfo::IsNone(rmode_);
 }
 
 
+MemOperand::PairResult MemOperand::AreConsistentForPair(
+                                                   const MemOperand& operandA,

[ulan, 2014/06/04 09:28:19]

Nit: indent to four spaces

[vincent.belliard, 2014/06/09 10:31:15]

Done.

+                                                   const MemOperand& operandB,
+                                                   int access_size_log2) {
+  ASSERT(access_size_log2 >= 0);
+  ASSERT(access_size_log2 <= 3);
+  // Step one: check that they share the same base, that the mode is Offset
+  // and that the offset is a multiple of 8.
+  if (!operandA.base().Is(operandB.base()) ||
+      (operandA.addrmode() != Offset) ||
+      (operandB.addrmode() != Offset) ||
+      ((operandA.offset() & 0x7) != 0)) {

[ulan, 2014/06/04 09:28:19]

Is the offset required to be multiple of 8 or multiple of "access_size"?

Shoudn't the condition also check operandB.offset() if it comes before operandA?

[vincent.belliard, 2014/06/09 10:31:15]

Fixed: offset multiple of access size.

The following tests will check that abs(A.offset - B.offset) == access_size so,
if A.offset is multiple of access_size and this condition is true then B.offset
is multiple of access size.

+    return kNotPair;
+  }
+  // Step two: check that the offsets are contiguous and that the range
+  // is OK for ldp/stp.
+  if ((operandB.offset() == operandA.offset() + (1 << access_size_log2)) &&
+      is_int7(operandA.offset() >> access_size_log2)) {
+    return kPairAB;
+  }
+  if ((operandA.offset() == operandB.offset() + (1 << access_size_log2)) &&
+      is_int7(operandB.offset() >> access_size_log2)) {
+    return kPairBA;
+  }
+  return kNotPair;
+}
+
+
 // Assembler
 
 Assembler::Assembler(Isolate* isolate, void* buffer, int buffer_size)
     : AssemblerBase(isolate, buffer, buffer_size),
       recorded_ast_id_(TypeFeedbackId::None()),
       unresolved_branches_(),
       positions_recorder_(this) {
   const_pool_blocked_nesting_ = 0;
   veneer_pool_blocked_nesting_ = 0;
   Reset();
@@ skipping 2600 matching lines @@
     adr(rd, 0);
     MovInt64(scratch, target_offset);
     add(rd, rd, scratch);
   }
 }
 
 
 } }  // namespace v8::internal
 
 #endif  // V8_TARGET_ARCH_ARM64