| Index: src/compiler/arm64/instruction-selector-arm64.cc
|
| diff --git a/src/compiler/arm64/instruction-selector-arm64.cc b/src/compiler/arm64/instruction-selector-arm64.cc
|
| index 2a7b9299c22dd63a009aff89eeef70d0c8442a1b..c4ad024318f86647dae7cc67c2355e78fac0b9d9 100644
|
| --- a/src/compiler/arm64/instruction-selector-arm64.cc
|
| +++ b/src/compiler/arm64/instruction-selector-arm64.cc
|
| @@ -946,7 +946,8 @@ void InstructionSelector::VisitWord64And(Node* node) {
|
| uint64_t mask = m.right().Value();
|
| uint64_t mask_width = base::bits::CountPopulation64(mask);
|
| uint64_t mask_msb = base::bits::CountLeadingZeros64(mask);
|
| - if ((mask_width != 0) && (mask_msb + mask_width == 64)) {
|
| + if ((mask_width != 0) && (mask_width != 64) &&
|
| + (mask_msb + mask_width == 64)) {
|
| // The mask must be contiguous, and occupy the least-significant bits.
|
| DCHECK_EQ(0u, base::bits::CountTrailingZeros64(mask));
|
|
|
|
|