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Side by Side Diff: src/s390/macro-assembler-s390.cc

Issue 2685733002: S390: Use macro to declare rxy format assember function (Closed)
Patch Set: Use static cast for casting integer to Condition Created 3 years, 10 months ago
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1 // Copyright 2014 the V8 project authors. All rights reserved. 1 // Copyright 2014 the V8 project authors. All rights reserved.
2 // Use of this source code is governed by a BSD-style license that can be 2 // Use of this source code is governed by a BSD-style license that can be
3 // found in the LICENSE file. 3 // found in the LICENSE file.
4 4
5 #include <assert.h> // For assert 5 #include <assert.h> // For assert
6 #include <limits.h> // For LONG_MIN, LONG_MAX. 6 #include <limits.h> // For LONG_MIN, LONG_MAX.
7 7
8 #if V8_TARGET_ARCH_S390 8 #if V8_TARGET_ARCH_S390
9 9
10 #include "src/base/bits.h" 10 #include "src/base/bits.h"
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1632 1632
1633 if ((flags & ALLOCATION_FOLDING_DOMINATOR) == 0) { 1633 if ((flags & ALLOCATION_FOLDING_DOMINATOR) == 0) {
1634 // The top pointer is not updated for allocation folding dominators. 1634 // The top pointer is not updated for allocation folding dominators.
1635 StoreP(result_end, MemOperand(top_address)); 1635 StoreP(result_end, MemOperand(top_address));
1636 } 1636 }
1637 1637
1638 if (CpuFeatures::IsSupported(GENERAL_INSTR_EXT)) { 1638 if (CpuFeatures::IsSupported(GENERAL_INSTR_EXT)) {
1639 // Prefetch the allocation_top's next cache line in advance to 1639 // Prefetch the allocation_top's next cache line in advance to
1640 // help alleviate potential cache misses. 1640 // help alleviate potential cache misses.
1641 // Mode 2 - Prefetch the data into a cache line for store access. 1641 // Mode 2 - Prefetch the data into a cache line for store access.
1642 pfd(r2, MemOperand(result, 256)); 1642 pfd(static_cast<Condition>(2), MemOperand(result, 256));
1643 } 1643 }
1644 1644
1645 // Tag object. 1645 // Tag object.
1646 la(result, MemOperand(result, kHeapObjectTag)); 1646 la(result, MemOperand(result, kHeapObjectTag));
1647 } 1647 }
1648 1648
1649 void MacroAssembler::Allocate(Register object_size, Register result, 1649 void MacroAssembler::Allocate(Register object_size, Register result,
1650 Register result_end, Register scratch, 1650 Register result_end, Register scratch,
1651 Label* gc_required, AllocationFlags flags) { 1651 Label* gc_required, AllocationFlags flags) {
1652 DCHECK((flags & ALLOCATION_FOLDED) == 0); 1652 DCHECK((flags & ALLOCATION_FOLDED) == 0);
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1731 } 1731 }
1732 if ((flags & ALLOCATION_FOLDING_DOMINATOR) == 0) { 1732 if ((flags & ALLOCATION_FOLDING_DOMINATOR) == 0) {
1733 // The top pointer is not updated for allocation folding dominators. 1733 // The top pointer is not updated for allocation folding dominators.
1734 StoreP(result_end, MemOperand(top_address)); 1734 StoreP(result_end, MemOperand(top_address));
1735 } 1735 }
1736 1736
1737 if (CpuFeatures::IsSupported(GENERAL_INSTR_EXT)) { 1737 if (CpuFeatures::IsSupported(GENERAL_INSTR_EXT)) {
1738 // Prefetch the allocation_top's next cache line in advance to 1738 // Prefetch the allocation_top's next cache line in advance to
1739 // help alleviate potential cache misses. 1739 // help alleviate potential cache misses.
1740 // Mode 2 - Prefetch the data into a cache line for store access. 1740 // Mode 2 - Prefetch the data into a cache line for store access.
1741 pfd(r2, MemOperand(result, 256)); 1741 pfd(static_cast<Condition>(2), MemOperand(result, 256));
1742 } 1742 }
1743 1743
1744 // Tag object. 1744 // Tag object.
1745 la(result, MemOperand(result, kHeapObjectTag)); 1745 la(result, MemOperand(result, kHeapObjectTag));
1746 } 1746 }
1747 1747
1748 void MacroAssembler::FastAllocate(Register object_size, Register result, 1748 void MacroAssembler::FastAllocate(Register object_size, Register result,
1749 Register result_end, Register scratch, 1749 Register result_end, Register scratch,
1750 AllocationFlags flags) { 1750 AllocationFlags flags) {
1751 // |object_size| and |result_end| may overlap if the DOUBLE_ALIGNMENT flag 1751 // |object_size| and |result_end| may overlap if the DOUBLE_ALIGNMENT flag
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1791 if (emit_debug_code()) { 1791 if (emit_debug_code()) {
1792 AndP(r0, result_end, Operand(kObjectAlignmentMask)); 1792 AndP(r0, result_end, Operand(kObjectAlignmentMask));
1793 Check(eq, kUnalignedAllocationInNewSpace, cr0); 1793 Check(eq, kUnalignedAllocationInNewSpace, cr0);
1794 } 1794 }
1795 StoreP(result_end, MemOperand(top_address)); 1795 StoreP(result_end, MemOperand(top_address));
1796 1796
1797 if (CpuFeatures::IsSupported(GENERAL_INSTR_EXT)) { 1797 if (CpuFeatures::IsSupported(GENERAL_INSTR_EXT)) {
1798 // Prefetch the allocation_top's next cache line in advance to 1798 // Prefetch the allocation_top's next cache line in advance to
1799 // help alleviate potential cache misses. 1799 // help alleviate potential cache misses.
1800 // Mode 2 - Prefetch the data into a cache line for store access. 1800 // Mode 2 - Prefetch the data into a cache line for store access.
1801 pfd(r2, MemOperand(result, 256)); 1801 pfd(static_cast<Condition>(2), MemOperand(result, 256));
1802 } 1802 }
1803 1803
1804 // Tag object. 1804 // Tag object.
1805 la(result, MemOperand(result, kHeapObjectTag)); 1805 la(result, MemOperand(result, kHeapObjectTag));
1806 } 1806 }
1807 1807
1808 void MacroAssembler::FastAllocate(int object_size, Register result, 1808 void MacroAssembler::FastAllocate(int object_size, Register result,
1809 Register scratch1, Register scratch2, 1809 Register scratch1, Register scratch2,
1810 AllocationFlags flags) { 1810 AllocationFlags flags) {
1811 DCHECK(object_size <= kMaxRegularHeapObjectSize); 1811 DCHECK(object_size <= kMaxRegularHeapObjectSize);
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1859 // Calculate new top using result. 1859 // Calculate new top using result.
1860 AddP(result_end, result, Operand(object_size)); 1860 AddP(result_end, result, Operand(object_size));
1861 // Update allocation top. 1861 // Update allocation top.
1862 StoreP(result_end, MemOperand(top_address)); 1862 StoreP(result_end, MemOperand(top_address));
1863 #endif 1863 #endif
1864 1864
1865 if (CpuFeatures::IsSupported(GENERAL_INSTR_EXT)) { 1865 if (CpuFeatures::IsSupported(GENERAL_INSTR_EXT)) {
1866 // Prefetch the allocation_top's next cache line in advance to 1866 // Prefetch the allocation_top's next cache line in advance to
1867 // help alleviate potential cache misses. 1867 // help alleviate potential cache misses.
1868 // Mode 2 - Prefetch the data into a cache line for store access. 1868 // Mode 2 - Prefetch the data into a cache line for store access.
1869 pfd(r2, MemOperand(result, 256)); 1869 pfd(static_cast<Condition>(2), MemOperand(result, 256));
1870 } 1870 }
1871 1871
1872 // Tag object. 1872 // Tag object.
1873 la(result, MemOperand(result, kHeapObjectTag)); 1873 la(result, MemOperand(result, kHeapObjectTag));
1874 } 1874 }
1875 1875
1876 void MacroAssembler::CompareObjectType(Register object, Register map, 1876 void MacroAssembler::CompareObjectType(Register object, Register map,
1877 Register type_reg, InstanceType type) { 1877 Register type_reg, InstanceType type) {
1878 const Register temp = type_reg.is(no_reg) ? r0 : type_reg; 1878 const Register temp = type_reg.is(no_reg) ? r0 : type_reg;
1879 1879
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5363 } 5363 }
5364 if (mag.shift > 0) ShiftRightArith(result, result, Operand(mag.shift)); 5364 if (mag.shift > 0) ShiftRightArith(result, result, Operand(mag.shift));
5365 ExtractBit(r0, dividend, 31); 5365 ExtractBit(r0, dividend, 31);
5366 AddP(result, r0); 5366 AddP(result, r0);
5367 } 5367 }
5368 5368
5369 } // namespace internal 5369 } // namespace internal
5370 } // namespace v8 5370 } // namespace v8
5371 5371
5372 #endif // V8_TARGET_ARCH_S390 5372 #endif // V8_TARGET_ARCH_S390
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