[Turbofan] Add more non-arithmetic SIMD operations.

src/wasm/wasm-opcodes.cc

 // Copyright 2015 the V8 project authors. All rights reserved.
 // Use of this source code is governed by a BSD-style license that can be
 // found in the LICENSE file.
 
 #include "src/wasm/wasm-opcodes.h"
 #include "src/messages.h"
 #include "src/runtime/runtime.h"
 #include "src/signature.h"
 
 namespace v8 {
 namespace internal {
 namespace wasm {
 
 typedef Signature<ValueType> FunctionSig;
 
 #define CASE_OP(name, str) \
   case kExpr##name:        \
     return str;
 #define CASE_I32_OP(name, str) CASE_OP(I32##name, "i32." str)
 #define CASE_I64_OP(name, str) CASE_OP(I64##name, "i64." str)
 #define CASE_F32_OP(name, str) CASE_OP(F32##name, "f32." str)
 #define CASE_F64_OP(name, str) CASE_OP(F64##name, "f64." str)
 #define CASE_S128_OP(name, str) CASE_OP(S128##name, "s128." str)
 #define CASE_F32x4_OP(name, str) CASE_OP(F32x4##name, "f32x4." str)
 #define CASE_I32x4_OP(name, str) CASE_OP(I32x4##name, "i32x4." str)
 #define CASE_I16x8_OP(name, str) CASE_OP(I16x8##name, "i16x8." str)
 #define CASE_I8x16_OP(name, str) CASE_OP(I8x16##name, "i8x16." str)
 #define CASE_S32x4_OP(name, str) CASE_OP(S32x4##name, "s32x4." str)
+#define CASE_S16x8_OP(name, str) CASE_OP(S16x8##name, "s16x8." str)
+#define CASE_S8x16_OP(name, str) CASE_OP(S8x16##name, "s8x16." str)
 #define CASE_INT_OP(name, str) CASE_I32_OP(name, str) CASE_I64_OP(name, str)
 #define CASE_FLOAT_OP(name, str) CASE_F32_OP(name, str) CASE_F64_OP(name, str)
 #define CASE_ALL_OP(name, str) CASE_FLOAT_OP(name, str) CASE_INT_OP(name, str)
 #define CASE_SIMD_OP(name, str)                                              \
   CASE_F32x4_OP(name, str) CASE_I32x4_OP(name, str) CASE_I16x8_OP(name, str) \
       CASE_I8x16_OP(name, str)
 #define CASE_SIMDI_OP(name, str) \
   CASE_I32x4_OP(name, str) CASE_I16x8_OP(name, str) CASE_I8x16_OP(name, str)
 #define CASE_SIGN_OP(TYPE, name, str) \
   CASE_##TYPE##_OP(name##S, str "_s") CASE_##TYPE##_OP(name##U, str "_u")
@@ skipping 137 matching lines @@
     CASE_F32x4_OP(SqrtApprox, "sqrt_approx")
     CASE_F32x4_OP(Min, "min")
     CASE_F32x4_OP(Max, "max")
     CASE_F32x4_OP(MinNum, "min_num")
     CASE_F32x4_OP(MaxNum, "max_num")
     CASE_F32x4_OP(Lt, "lt")
     CASE_F32x4_OP(Le, "le")
     CASE_F32x4_OP(Gt, "gt")
     CASE_F32x4_OP(Ge, "ge")
     CASE_CONVERT_OP(Convert, F32x4, I32x4, "i32", "convert")
+    CASE_CONVERT_OP(Convert, I32x4, F32x4, "f32", "convert")
     CASE_F32x4_OP(ExtractLane, "extract_lane")
     CASE_F32x4_OP(ReplaceLane, "replace_lane")
     CASE_SIMDI_OP(ExtractLane, "extract_lane")
     CASE_SIMDI_OP(ReplaceLane, "replace_lane")
     CASE_SIGN_OP(SIMDI, Min, "min")
     CASE_SIGN_OP(SIMDI, Max, "max")
     CASE_SIGN_OP(SIMDI, Lt, "lt")
     CASE_SIGN_OP(SIMDI, Le, "le")
     CASE_SIGN_OP(SIMDI, Gt, "gt")
     CASE_SIGN_OP(SIMDI, Ge, "ge")
     CASE_SIGN_OP(SIMDI, Shr, "shr")
     CASE_SIMDI_OP(Shl, "shl")
-    CASE_SIMDI_OP(Swizzle, "swizzle")
-    CASE_SIMDI_OP(Shuffle, "shuffle")
-    CASE_SIMDI_OP(Select, "select")
-    CASE_S128_OP(Ior, "or")
+    CASE_SIGN_OP(I16x8, AddSaturate, "add_saturate")
+    CASE_SIGN_OP(I8x16, AddSaturate, "add_saturate")
+    CASE_SIGN_OP(I16x8, SubSaturate, "sub_saturate")
+    CASE_SIGN_OP(I8x16, SubSaturate, "sub_saturate")
+    CASE_S128_OP(Or, "or")
     CASE_S128_OP(Xor, "xor")
     CASE_S128_OP(And, "and")
     CASE_S128_OP(Not, "not")
     CASE_S32x4_OP(Select, "select")
     CASE_S32x4_OP(Swizzle, "swizzle")
     CASE_S32x4_OP(Shuffle, "shuffle")
-    CASE_CONVERT_OP(Convert, I32x4, F32x4, "f32", "convert")
-    CASE_SIGN_OP(I16x8, AddSaturate, "add_saturate")
-    CASE_SIGN_OP(I8x16, AddSaturate, "add_saturate")
-    CASE_SIGN_OP(I16x8, SubSaturate, "sub_saturate")
-    CASE_SIGN_OP(I8x16, SubSaturate, "sub_saturate")
+    CASE_S16x8_OP(Select, "select")
+    CASE_S16x8_OP(Swizzle, "swizzle")
+    CASE_S16x8_OP(Shuffle, "shuffle")
+    CASE_S8x16_OP(Select, "select")
+    CASE_S8x16_OP(Swizzle, "swizzle")
+    CASE_S8x16_OP(Shuffle, "shuffle")
 
     // Atomic operations.
     CASE_L32_OP(AtomicAdd, "atomic_add")
     CASE_L32_OP(AtomicAnd, "atomic_and")
     CASE_L32_OP(AtomicCompareExchange, "atomic_cmpxchng")
     CASE_L32_OP(AtomicExchange, "atomic_xchng")
     CASE_L32_OP(AtomicOr, "atomic_or")
     CASE_L32_OP(AtomicSub, "atomic_sub")
     CASE_L32_OP(AtomicXor, "atomic_xor")
 
@@ skipping 138 matching lines @@
       return MessageTemplate::kNone;
   }
 }
 
 const char* WasmOpcodes::TrapReasonMessage(TrapReason reason) {
   return MessageTemplate::TemplateString(TrapReasonToMessageId(reason));
 }
 }  // namespace wasm
 }  // namespace internal
 }  // namespace v8