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1 // Copyright 2011 the V8 project authors. All rights reserved. | 1 // Copyright 2011 the V8 project authors. All rights reserved. |
2 // Redistribution and use in source and binary forms, with or without | 2 // Redistribution and use in source and binary forms, with or without |
3 // modification, are permitted provided that the following conditions are | 3 // modification, are permitted provided that the following conditions are |
4 // met: | 4 // met: |
5 // | 5 // |
6 // * Redistributions of source code must retain the above copyright | 6 // * Redistributions of source code must retain the above copyright |
7 // notice, this list of conditions and the following disclaimer. | 7 // notice, this list of conditions and the following disclaimer. |
8 // * Redistributions in binary form must reproduce the above | 8 // * Redistributions in binary form must reproduce the above |
9 // copyright notice, this list of conditions and the following | 9 // copyright notice, this list of conditions and the following |
10 // disclaimer in the documentation and/or other materials provided | 10 // disclaimer in the documentation and/or other materials provided |
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255 void LGapResolver::EmitSwap(int index) { | 255 void LGapResolver::EmitSwap(int index) { |
256 LOperand* source = moves_[index].source(); | 256 LOperand* source = moves_[index].source(); |
257 LOperand* destination = moves_[index].destination(); | 257 LOperand* destination = moves_[index].destination(); |
258 | 258 |
259 // Dispatch on the source and destination operand kinds. Not all | 259 // Dispatch on the source and destination operand kinds. Not all |
260 // combinations are possible. | 260 // combinations are possible. |
261 if (source->IsRegister() && destination->IsRegister()) { | 261 if (source->IsRegister() && destination->IsRegister()) { |
262 // Swap two general-purpose registers. | 262 // Swap two general-purpose registers. |
263 Register src = cgen_->ToRegister(source); | 263 Register src = cgen_->ToRegister(source); |
264 Register dst = cgen_->ToRegister(destination); | 264 Register dst = cgen_->ToRegister(destination); |
265 __ xchg(dst, src); | 265 __ xchgq(dst, src); |
266 | 266 |
267 } else if ((source->IsRegister() && destination->IsStackSlot()) || | 267 } else if ((source->IsRegister() && destination->IsStackSlot()) || |
268 (source->IsStackSlot() && destination->IsRegister())) { | 268 (source->IsStackSlot() && destination->IsRegister())) { |
269 // Swap a general-purpose register and a stack slot. | 269 // Swap a general-purpose register and a stack slot. |
270 Register reg = | 270 Register reg = |
271 cgen_->ToRegister(source->IsRegister() ? source : destination); | 271 cgen_->ToRegister(source->IsRegister() ? source : destination); |
272 Operand mem = | 272 Operand mem = |
273 cgen_->ToOperand(source->IsRegister() ? destination : source); | 273 cgen_->ToOperand(source->IsRegister() ? destination : source); |
274 __ movq(kScratchRegister, mem); | 274 __ movq(kScratchRegister, mem); |
275 __ movq(mem, reg); | 275 __ movq(mem, reg); |
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327 moves_[i].set_source(source); | 327 moves_[i].set_source(source); |
328 } | 328 } |
329 } | 329 } |
330 } | 330 } |
331 | 331 |
332 #undef __ | 332 #undef __ |
333 | 333 |
334 } } // namespace v8::internal | 334 } } // namespace v8::internal |
335 | 335 |
336 #endif // V8_TARGET_ARCH_X64 | 336 #endif // V8_TARGET_ARCH_X64 |
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