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Unified Diff: test/mjsunit/wasm/unreachable-validation.js

Issue 2670673002: [wasm] Implement polymorphic checking, matching the reference interpreter. (Closed)
Patch Set: Fix test-run-simd Created 3 years, 11 months ago
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Index: test/mjsunit/wasm/unreachable-validation.js
diff --git a/test/mjsunit/wasm/unreachable-validation.js b/test/mjsunit/wasm/unreachable-validation.js
index 773614bb4d092cd00befe8a3f39122d73d301d98..a6e0cd36f055b47ff8cda6e6459c4a2a7cac9890 100644
--- a/test/mjsunit/wasm/unreachable-validation.js
+++ b/test/mjsunit/wasm/unreachable-validation.js
@@ -39,7 +39,8 @@ let nop = kExprNop;
let iadd = kExprI32Add;
let unr = kExprUnreachable;
let ret = kExprReturn;
-let br0 = [kExprBr, 0]
+let br0 = [kExprBr, 0];
+let brt = [kExprBrTable, 0, 0];
let f32 = [kExprF32Const, 0, 0, 0, 0];
let zero = [kExprI32Const, 0];
let if_else_empty = [kExprIf, kWasmStmt, kExprElse, kExprEnd];
@@ -51,7 +52,7 @@ let block_block_unr = [kExprBlock, kWasmStmt, kExprBlock, kWasmStmt, kExprUnreac
let drop = kExprDrop;
run(V, "U", [unr]);
-run(V, "U U", [unr, unr]);
+run(V, 'U U', [unr, unr]);
run(V, "(if 0 () else ())", [...zero, ...if_else_empty]);
run(V, "(if 0 U)", [...zero, ...if_unr]);
run(V, "(if 0 U U)", [...zero, ...if_else_unr]);
@@ -64,26 +65,33 @@ run(V, "(block U)", [...block_unr]);
run(V, "(loop U)", [...loop_unr]);
run(V, "(if 0 U U)", [...zero, ...if_else_unr]);
-run(V, "U nop", [unr, nop]);
-run(V, "U iadd drop", [unr, iadd, drop]);
-run(V, "br0 iadd drop", [br0, iadd, drop]);
-run(V, "ret iadd drop", [ret, iadd, drop]);
-
-run(V, "br0 iadd", [br0, iadd]);
-run(V, "ret iadd", [ret, iadd]);
-run(V, "0 0 br0 iadd", [...zero, ...zero, br0, iadd]);
-run(V, "0 0 ret iadd", [...zero, ...zero, ret, iadd]);
-
-run(V, "(block U) iadd drop", [...block_unr, iadd, drop]);
-run(V, "(block (block U)) iadd drop", [...block_block_unr, iadd, drop]);
-run(V, "(loop U) iadd drop", [...loop_unr, iadd]);
-run(V, "(if 0 U U) iadd drop", [...zero, ...if_else_unr, iadd, drop]);
-
-run(V, "U 0 0 iadd drop", [unr, ...zero, ...zero, iadd, drop]);
+run(V, 'U nop', [unr, nop]);
+run(V, 'U iadd drop', [unr, iadd, drop]);
+run(V, 'br0 iadd drop', [...br0, iadd, drop]);
+run(V, '0 brt iadd drop', [...zero, ...brt, iadd, drop]);
+run(V, 'ret iadd drop', [ret, iadd, drop]);
+
+run(V, 'U 0 0 iadd drop', [unr, ...zero, ...zero, iadd, drop]);
+run(V, 'br0 0 0 iadd drop', [...br0, ...zero, ...zero, iadd, drop]);
+run(V, '0 brt 0 0 iadd drop', [...zero, ...brt, ...zero, ...zero, iadd, drop]);
+run(V, 'ret 0 0 iadd drop', [ret, ...zero, ...zero, iadd, drop]);
+
+run(I, 'br0 iadd', [...br0, iadd]);
+run(I, '0 brt iadd', [...zero, ...brt, iadd]);
+run(I, 'ret iadd', [ret, iadd]);
+run(I, '0 0 br0 iadd', [...zero, ...zero, ...br0, iadd]);
+run(I, '0 0 ret iadd', [...zero, ...zero, ret, iadd]);
+
+run(I, '(block U) iadd drop', [...block_unr, iadd, drop]);
+run(I, '(block (block U)) iadd drop', [...block_block_unr, iadd, drop]);
+run(I, '(loop U) iadd drop', [...loop_unr, iadd]);
+run(I, '(if 0 U U) iadd drop', [...zero, ...if_else_unr, iadd, drop]);
+
+run(V, 'U 0 0 iadd drop', [unr, ...zero, ...zero, iadd, drop]);
run(V, "(block U) 0 0 iadd drop", [...block_unr, ...zero, ...zero, iadd, drop]);
run(V, "(loop U) 0 0 iadd drop", [...loop_unr, ...zero, ...zero, iadd, drop]);
run(V, "(block (block U)) 0 0 iadd drop", [...block_block_unr, ...zero, ...zero, iadd, drop]);
-run(V, "0 0 U iadd drop", [...zero, ...zero, unr, iadd, drop]);
+run(V, '0 0 U iadd drop', [...zero, ...zero, unr, iadd, drop]);
run(V, "0 0 (block U) iadd drop", [...zero, ...zero, ...block_unr, iadd, drop]);
run(V, "0 0 (loop U) iadd drop", [...zero, ...zero, ...loop_unr, iadd, drop]);
run(V, "0 0 (block (block U)) iadd drop", [...zero, ...zero, ...block_block_unr, iadd, drop]);
@@ -96,10 +104,10 @@ run(I, "(block U) 0f 0 iadd drop", [...block_unr, ...f32, ...zero, iadd, drop]);
run(I, "(loop U) 0f 0 iadd drop", [...loop_unr, ...f32, ...zero, iadd, drop]);
run(I, "(block (block U)) 0f 0 iadd drop", [...block_block_unr, ...f32, ...zero, iadd, drop]);
-run(V, "0f U iadd drop", [...f32, unr, iadd, drop]);
-run(V, "0f 0 U iadd drop", [...f32, ...zero, unr, iadd, drop]);
+run(V, '0f U iadd drop', [...f32, unr, iadd, drop]);
+run(V, '0f 0 U iadd drop', [...f32, ...zero, unr, iadd, drop]);
run(I, "0f 0 (block U) iadd drop", [...f32, ...zero, ...block_unr, iadd, drop]);
-run(V, "0f U 0 iadd drop", [...f32, unr, ...zero, iadd, drop]);
+run(V, '0f U 0 iadd drop', [...f32, unr, ...zero, iadd, drop]);
run(I, "0 U 0f iadd drop", [...zero, unr, ...zero, ...f32, iadd, drop]);
run(I, "0f (block U) 0 iadd drop", [...f32, ...block_unr, ...zero, iadd, drop]);
run(I, "0 (block U) 0f iadd drop", [...zero, ...block_unr, ...f32, iadd, drop]);
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