s390: fix shift operand overflow

src/compiler/s390/instruction-selector-s390.cc

 // Copyright 2015 the V8 project authors. All rights reserved.
 // Use of this source code is governed by a BSD-style license that can be
 // found in the LICENSE file.
 
 #include "src/base/adapters.h"
 #include "src/compiler/instruction-selector-impl.h"
 #include "src/compiler/node-matchers.h"
 #include "src/compiler/node-properties.h"
 #include "src/s390/frames-s390.h"
 
@@ skipping 13 matching lines @@
   // Instr format
   kAllowRRR = 1u << 7,
   kAllowRM = 1u << 8,
   kAllowRI = 1u << 9,
   kAllowRRI = 1u << 10,
   kAllowRRM = 1u << 11,
   // Useful combination
   kAllowImmediate = kAllowRI | kAllowRRI,
   kAllowMemoryOperand = kAllowRM | kAllowRRM,
   kAllowDistinctOps = kAllowRRR | kAllowRRI | kAllowRRM,
-  kBitWiseCommonMode = kAllowRI | kUint32Imm,
+  kBitWiseCommonMode = kAllowRI,
   kArithmeticCommonMode = kAllowRM | kAllowRI
 };
 
 typedef base::Flags<OperandMode, uint32_t> OperandModes;
 DEFINE_OPERATORS_FOR_FLAGS(OperandModes);
 OperandModes immediateModeMask =
     OperandMode::kShift32Imm | OperandMode::kShift64Imm |
     OperandMode::kInt32Imm | OperandMode::kInt32Imm_Negate |
     OperandMode::kUint32Imm | OperandMode::kInt20Imm;
 
-#define BitWiseOperandMode                  \
-  ((OperandMode::kBitWiseCommonMode |       \
-    (CpuFeatures::IsSupported(DISTINCT_OPS) \
-         ? OperandMode::kAllowRRR           \
+#define AndOperandMode                                              \
+  ((OperandMode::kBitWiseCommonMode | OperandMode::kUint32Imm |     \
+    OperandMode::kAllowRM | (CpuFeatures::IsSupported(DISTINCT_OPS) \
+                                 ? OperandMode::kAllowRRR           \
+                                 : OperandMode::kBitWiseCommonMode)))
+
+#define OrOperandMode AndOperandMode
+#define XorOperandMode AndOperandMode
+
+#define ShiftOperandMode                                         \
+  ((OperandMode::kBitWiseCommonMode | OperandMode::kShift64Imm | \
+    (CpuFeatures::IsSupported(DISTINCT_OPS)                      \
+         ? OperandMode::kAllowRRR                                \
          : OperandMode::kBitWiseCommonMode)))
+
 #define AddOperandMode                                            \
   ((OperandMode::kArithmeticCommonMode | OperandMode::kInt32Imm | \
     (CpuFeatures::IsSupported(DISTINCT_OPS)                       \
          ? (OperandMode::kAllowRRR | OperandMode::kAllowRRI)      \
          : OperandMode::kArithmeticCommonMode)))
 #define SubOperandMode                                                   \
   ((OperandMode::kArithmeticCommonMode | OperandMode::kInt32Imm_Negate | \
     (CpuFeatures::IsSupported(DISTINCT_OPS)                              \
          ? (OperandMode::kAllowRRR | OperandMode::kAllowRRI)             \
          : OperandMode::kArithmeticCommonMode)))
@@ skipping 762 matching lines @@
   int mask_lsb = base::bits::CountTrailingZeros64(value);
   if ((mask_width == 0) || (mask_msb + mask_width + mask_lsb != 64))
     return false;
   *mb = mask_lsb + mask_width - 1;
   *me = mask_lsb;
   return true;
 }
 #endif
 
 void InstructionSelector::VisitWord32And(Node* node) {
-  VisitBin32op(this, node, kS390_And32,
-               BitWiseOperandMode | OperandMode::kAllowRM);
+  VisitBin32op(this, node, kS390_And32, AndOperandMode);
 }
 
 #if V8_TARGET_ARCH_S390X
 void InstructionSelector::VisitWord64And(Node* node) {
   S390OperandGenerator g(this);
   Int64BinopMatcher m(node);
   int mb = 0;
   int me = 0;
   if (m.right().HasValue() && IsContiguousMask64(m.right().Value(), &mb, &me)) {
     int sh = 0;
@@ skipping 37 matching lines @@
         return;
       }
     }
   }
   VisitBinop<Int64BinopMatcher>(this, node, kS390_And64,
                                 OperandMode::kUint32Imm);
 }
 #endif
 
 void InstructionSelector::VisitWord32Or(Node* node) {
-  VisitBin32op(this, node, kS390_Or32,
-               BitWiseOperandMode | OperandMode::kAllowRM);
+  VisitBin32op(this, node, kS390_Or32, OrOperandMode);
 }
 
 #if V8_TARGET_ARCH_S390X
 void InstructionSelector::VisitWord64Or(Node* node) {
   Int64BinopMatcher m(node);
   VisitBinop<Int64BinopMatcher>(this, node, kS390_Or64,
                                 OperandMode::kUint32Imm);
 }
 #endif
 
 void InstructionSelector::VisitWord32Xor(Node* node) {
-  VisitBin32op(this, node, kS390_Xor32,
-               BitWiseOperandMode | OperandMode::kAllowRM);
+  VisitBin32op(this, node, kS390_Xor32, XorOperandMode);
 }
 
 #if V8_TARGET_ARCH_S390X
 void InstructionSelector::VisitWord64Xor(Node* node) {
   VisitBinop<Int64BinopMatcher>(this, node, kS390_Xor64,
                                 OperandMode::kUint32Imm);
 }
 #endif
 
 void InstructionSelector::VisitWord32Shl(Node* node) {
-  VisitBin32op(this, node, kS390_ShiftLeft32, BitWiseOperandMode);
+  VisitBin32op(this, node, kS390_ShiftLeft32, ShiftOperandMode);
 }
 
 #if V8_TARGET_ARCH_S390X
 void InstructionSelector::VisitWord64Shl(Node* node) {
   S390OperandGenerator g(this);
   Int64BinopMatcher m(node);
   // TODO(mbrandy): eliminate left sign extension if right >= 32
   if (m.left().IsWord64And() && m.right().IsInRange(0, 63)) {
     Int64BinopMatcher mleft(m.left().node());
     int sh = m.right().Value();
@@ skipping 27 matching lines @@
           return;
         }
       }
     }
   }
   VisitRRO(this, kS390_ShiftLeft64, node, OperandMode::kShift64Imm);
 }
 #endif
 
 void InstructionSelector::VisitWord32Shr(Node* node) {
-  VisitBin32op(this, node, kS390_ShiftRight32, BitWiseOperandMode);
+  VisitBin32op(this, node, kS390_ShiftRight32, ShiftOperandMode);
 }
 
 #if V8_TARGET_ARCH_S390X
 void InstructionSelector::VisitWord64Shr(Node* node) {
   S390OperandGenerator g(this);
   Int64BinopMatcher m(node);
   if (m.left().IsWord64And() && m.right().IsInRange(0, 63)) {
     Int64BinopMatcher mleft(m.left().node());
     int sh = m.right().Value();
     int mb;
@@ skipping 42 matching lines @@
            g.UseRegister(mleft.left().node()), g.TempImmediate(doZeroExt));
       return;
     } else if (mleft.right().Is(24) && m.right().Is(24)) {
       bool doZeroExt = !ZeroExtendsWord32ToWord64(mleft.left().node());
       Emit(kS390_ExtendSignWord8,
            doZeroExt ? g.DefineAsRegister(node) : g.DefineSameAsFirst(node),
            g.UseRegister(mleft.left().node()), g.TempImmediate(doZeroExt));
       return;
     }
   }
-  VisitBin32op(this, node, kS390_ShiftRightArith32, BitWiseOperandMode);
+  VisitBin32op(this, node, kS390_ShiftRightArith32, ShiftOperandMode);
 }
 
 #if !V8_TARGET_ARCH_S390X
 void VisitPairBinop(InstructionSelector* selector, InstructionCode opcode,
                     InstructionCode opcode2, Node* node) {
   S390OperandGenerator g(selector);
 
   Node* projection1 = NodeProperties::FindProjection(node, 1);
   if (projection1) {
     // We use UseUniqueRegister here to avoid register sharing with the output
@@ skipping 1269 matching lines @@
 // static
 MachineOperatorBuilder::AlignmentRequirements
 InstructionSelector::AlignmentRequirements() {
   return MachineOperatorBuilder::AlignmentRequirements::
       FullUnalignedAccessSupport();
 }
 
 }  // namespace compiler
 }  // namespace internal
 }  // namespace v8