Merge ConstantInstr -> UnboxDouble to UnboxedConstant. Reduces register usage and allows for variou…

runtime/vm/flow_graph_compiler_arm.cc

 // Copyright (c) 2013, the Dart project authors.  Please see the AUTHORS file
 // for details. All rights reserved. Use of this source code is governed by a
 // BSD-style license that can be found in the LICENSE file.
 
 #include "vm/globals.h"  // Needed here to get TARGET_ARCH_ARM.
 #if defined(TARGET_ARCH_ARM)
 
 #include "vm/flow_graph_compiler.h"
 
 #include "vm/ast_printer.h"
@@ skipping 1590 matching lines @@
       } else {
         ASSERT(destination.IsQuadStackSlot());
         const intptr_t dest_offset = destination.ToStackSlotOffset();
         const DRegister dsrc0 = EvenDRegisterOf(source.fpu_reg());
         __ StoreMultipleDToOffset(dsrc0, 2, FP, dest_offset);
       }
     }
   } else if (source.IsDoubleStackSlot()) {
     if (destination.IsFpuRegister()) {
       const intptr_t dest_offset = source.ToStackSlotOffset();
-      DRegister dst = EvenDRegisterOf(destination.fpu_reg());
+      const DRegister dst = EvenDRegisterOf(destination.fpu_reg());
       __ LoadDFromOffset(dst, FP, dest_offset);
     } else {
       ASSERT(destination.IsDoubleStackSlot());
       const intptr_t source_offset = source.ToStackSlotOffset();
       const intptr_t dest_offset = destination.ToStackSlotOffset();
       __ LoadDFromOffset(DTMP, FP, source_offset);
       __ StoreDToOffset(DTMP, FP, dest_offset);
     }
   } else if (source.IsQuadStackSlot()) {
     if (destination.IsFpuRegister()) {
       const intptr_t dest_offset = source.ToStackSlotOffset();
       const DRegister dst0 = EvenDRegisterOf(destination.fpu_reg());
       __ LoadMultipleDFromOffset(dst0, 2, FP, dest_offset);
     } else {
       ASSERT(destination.IsQuadStackSlot());
       const intptr_t source_offset = source.ToStackSlotOffset();
       const intptr_t dest_offset = destination.ToStackSlotOffset();
       const DRegister dtmp0 = DTMP;
       __ LoadMultipleDFromOffset(dtmp0, 2, FP, source_offset);
       __ StoreMultipleDToOffset(dtmp0, 2, FP, dest_offset);
     }
   } else {
     ASSERT(source.IsConstant());
+    const Object& constant = source.constant();
     if (destination.IsRegister()) {
-      const Object& constant = source.constant();
       __ LoadObject(destination.reg(), constant);
+    } else if (destination.IsFpuRegister()) {
+      const DRegister dst = EvenDRegisterOf(destination.fpu_reg());
+      __ LoadObject(TMP, constant);
+      __ AddImmediate(TMP, TMP, Double::value_offset() - kHeapObjectTag);
+      __ vldrd(dst, Address(TMP, 0));
     } else {
       ASSERT(destination.IsStackSlot());
       const intptr_t dest_offset = destination.ToStackSlotOffset();
-      __ LoadObject(TMP, source.constant());
+      __ LoadObject(TMP, constant);
       __ StoreToOffset(kWord, TMP, FP, dest_offset);
     }
   }
 
   move->Eliminate();
 }
 
 
 void ParallelMoveResolver::EmitSwap(int index) {
   MoveOperands* move = moves_[index];
   const Location source = move->src();
   const Location destination = move->dest();
 
   if (source.IsRegister() && destination.IsRegister()) {
     ASSERT(source.reg() != IP);
     ASSERT(destination.reg() != IP);
     __ mov(IP, ShifterOperand(source.reg()));
     __ mov(source.reg(), ShifterOperand(destination.reg()));
     __ mov(destination.reg(), ShifterOperand(IP));
   } else if (source.IsRegister() && destination.IsStackSlot()) {
     Exchange(source.reg(), destination.ToStackSlotOffset());
   } else if (source.IsStackSlot() && destination.IsRegister()) {
     Exchange(destination.reg(), source.ToStackSlotOffset());
   } else if (source.IsStackSlot() && destination.IsStackSlot()) {
     Exchange(source.ToStackSlotOffset(), destination.ToStackSlotOffset());
   } else if (source.IsFpuRegister() && destination.IsFpuRegister()) {
-    DRegister dst = EvenDRegisterOf(destination.fpu_reg());
+    const DRegister dst = EvenDRegisterOf(destination.fpu_reg());
     DRegister src = EvenDRegisterOf(source.fpu_reg());
     __ vmovd(DTMP, src);
     __ vmovd(src, dst);
     __ vmovd(dst, DTMP);
   } else if (source.IsFpuRegister() || destination.IsFpuRegister()) {
     ASSERT(destination.IsDoubleStackSlot() ||
            destination.IsQuadStackSlot() ||
            source.IsDoubleStackSlot() ||
            source.IsQuadStackSlot());
     bool double_width = destination.IsDoubleStackSlot() ||
@@ skipping 110 matching lines @@
   DRegister dreg = EvenDRegisterOf(reg);
   __ vldrd(dreg, Address(SP, kDoubleSize, Address::PostIndex));
 }
 
 
 #undef __
 
 }  // namespace dart
 
 #endif  // defined TARGET_ARCH_ARM