Index: tests_lit/llvm2ice_tests/64bit.pnacl.ll |
diff --git a/tests_lit/llvm2ice_tests/64bit.pnacl.ll b/tests_lit/llvm2ice_tests/64bit.pnacl.ll |
index 761f38869cd11f9efde9d349e3e19d1bccec2b80..1ca807772428301034aa97fa647d29b56a64c97a 100644 |
--- a/tests_lit/llvm2ice_tests/64bit.pnacl.ll |
+++ b/tests_lit/llvm2ice_tests/64bit.pnacl.ll |
@@ -1,5 +1,10 @@ |
-; RUIN: %llvm2ice --verbose none %s | FileCheck %s |
-; RUIN: %llvm2ice --verbose none %s | FileCheck --check-prefix=ERRORS %s |
+; This tries to be a comprehensive test of i64 operations, in |
+; particular the patterns for lowering i64 operations into constituent |
+; i32 operations on x86-32. |
+ |
+; RUIN: %llvm2ice -O2 --verbose none %s | FileCheck %s |
+; RUN: %llvm2ice -Om1 --verbose none %s | FileCheck --check-prefix=OPTM1 %s |
+; RUN: %llvm2ice --verbose none %s | FileCheck --check-prefix=ERRORS %s |
; RUN: %llvm2iceinsts %s | %szdiff %s | FileCheck --check-prefix=DUMP %s |
; RUN: %llvm2iceinsts --pnacl %s | %szdiff %s \ |
; RUN: | FileCheck --check-prefix=DUMP %s |
@@ -40,6 +45,24 @@ entry: |
; CHECK-NEXT: push |
; CHECK-NEXT: push |
; CHECK-NEXT: call ignore64BitArgNoInline |
+; |
+; OPTM1: pass64BitArg: |
+; OPTM1: push 123 |
+; OPTM1-NEXT: push |
+; OPTM1-NEXT: push |
+; OPTM1-NEXT: call ignore64BitArgNoInline |
+; OPTM1: push |
+; OPTM1-NEXT: push |
+; OPTM1-NEXT: push 123 |
+; OPTM1-NEXT: push |
+; OPTM1-NEXT: push |
+; OPTM1-NEXT: call ignore64BitArgNoInline |
+; OPTM1: push |
+; OPTM1-NEXT: push |
+; OPTM1-NEXT: push 123 |
+; OPTM1-NEXT: push |
+; OPTM1-NEXT: push |
+; OPTM1-NEXT: call ignore64BitArgNoInline |
declare i32 @ignore64BitArgNoInline(i64, i32, i64) |
@@ -55,6 +78,14 @@ entry: |
; CHECK-NEXT: push ecx |
; CHECK-NEXT: push eax |
; CHECK-NEXT: call ignore64BitArgNoInline |
+; |
+; OPTM1: pass64BitConstArg: |
+; OPTM1: push 3735928559 |
+; OPTM1-NEXT: push 305419896 |
+; OPTM1-NEXT: push 123 |
+; OPTM1-NEXT: push dword ptr [ |
+; OPTM1-NEXT: push dword ptr [ |
+; OPTM1-NEXT: call ignore64BitArgNoInline |
define internal i64 @return64BitArg(i64 %a) { |
entry: |
@@ -64,6 +95,11 @@ entry: |
; CHECK: mov {{.*}}, dword ptr [esp+4] |
; CHECK: mov {{.*}}, dword ptr [esp+8] |
; CHECK: ret |
+; |
+; OPTM1: return64BitArg: |
+; OPTM1: mov {{.*}}, dword ptr [esp+4] |
+; OPTM1: mov {{.*}}, dword ptr [esp+8] |
+; OPTM1: ret |
define internal i64 @return64BitConst() { |
entry: |
@@ -73,6 +109,11 @@ entry: |
; CHECK: mov eax, 305419896 |
; CHECK: mov edx, 3735928559 |
; CHECK: ret |
+; |
+; OPTM1: return64BitConst: |
+; OPTM1: mov eax, 305419896 |
+; OPTM1: mov edx, 3735928559 |
+; OPTM1: ret |
define internal i64 @add64BitSigned(i64 %a, i64 %b) { |
entry: |
@@ -83,6 +124,11 @@ entry: |
; CHECK: add |
; CHECK: adc |
; CHECK: ret |
+; |
+; OPTM1: add64BitSigned: |
+; OPTM1: add |
+; OPTM1: adc |
+; OPTM1: ret |
define internal i64 @add64BitUnsigned(i64 %a, i64 %b) { |
entry: |
@@ -93,6 +139,11 @@ entry: |
; CHECK: add |
; CHECK: adc |
; CHECK: ret |
+; |
+; OPTM1: add64BitUnsigned: |
+; OPTM1: add |
+; OPTM1: adc |
+; OPTM1: ret |
define internal i64 @sub64BitSigned(i64 %a, i64 %b) { |
entry: |
@@ -103,6 +154,11 @@ entry: |
; CHECK: sub |
; CHECK: sbb |
; CHECK: ret |
+; |
+; OPTM1: sub64BitSigned: |
+; OPTM1: sub |
+; OPTM1: sbb |
+; OPTM1: ret |
define internal i64 @sub64BitUnsigned(i64 %a, i64 %b) { |
entry: |
@@ -113,6 +169,11 @@ entry: |
; CHECK: sub |
; CHECK: sbb |
; CHECK: ret |
+; |
+; OPTM1: sub64BitUnsigned: |
+; OPTM1: sub |
+; OPTM1: sbb |
+; OPTM1: ret |
define internal i64 @mul64BitSigned(i64 %a, i64 %b) { |
entry: |
@@ -126,6 +187,14 @@ entry: |
; CHECK: add |
; CHECK: add |
; CHECK: ret |
+; |
+; OPTM1: mul64BitSigned: |
+; OPTM1: imul |
+; OPTM1: imul |
+; OPTM1: mul |
+; OPTM1: add |
+; OPTM1: add |
+; OPTM1: ret |
define internal i64 @mul64BitUnsigned(i64 %a, i64 %b) { |
entry: |
@@ -139,6 +208,14 @@ entry: |
; CHECK: add |
; CHECK: add |
; CHECK: ret |
+; |
+; OPTM1: mul64BitUnsigned: |
+; OPTM1: imul |
+; OPTM1: imul |
+; OPTM1: mul |
+; OPTM1: add |
+; OPTM1: add |
+; OPTM1: ret |
define internal i64 @div64BitSigned(i64 %a, i64 %b) { |
entry: |
@@ -148,6 +225,10 @@ entry: |
; CHECK: div64BitSigned: |
; CHECK: call __divdi3 |
; CHECK: ret |
+; |
+; OPTM1: div64BitSigned: |
+; OPTM1: call __divdi3 |
+; OPTM1: ret |
define internal i64 @div64BitUnsigned(i64 %a, i64 %b) { |
entry: |
@@ -157,6 +238,10 @@ entry: |
; CHECK: div64BitUnsigned: |
; CHECK: call __udivdi3 |
; CHECK: ret |
+; |
+; OPTM1: div64BitUnsigned: |
+; OPTM1: call __udivdi3 |
+; OPTM1: ret |
define internal i64 @rem64BitSigned(i64 %a, i64 %b) { |
entry: |
@@ -166,6 +251,10 @@ entry: |
; CHECK: rem64BitSigned: |
; CHECK: call __moddi3 |
; CHECK: ret |
+; |
+; OPTM1: rem64BitSigned: |
+; OPTM1: call __moddi3 |
+; OPTM1: ret |
define internal i64 @rem64BitUnsigned(i64 %a, i64 %b) { |
entry: |
@@ -175,6 +264,10 @@ entry: |
; CHECK: rem64BitUnsigned: |
; CHECK: call __umoddi3 |
; CHECK: ret |
+; |
+; OPTM1: rem64BitUnsigned: |
+; OPTM1: call __umoddi3 |
+; OPTM1: ret |
define internal i64 @shl64BitSigned(i64 %a, i64 %b) { |
entry: |
@@ -186,6 +279,12 @@ entry: |
; CHECK: shl e |
; CHECK: test {{.*}}, 32 |
; CHECK: je |
+; |
+; OPTM1: shl64BitSigned: |
+; OPTM1: shld |
+; OPTM1: shl e |
+; OPTM1: test {{.*}}, 32 |
+; OPTM1: je |
define internal i64 @shl64BitUnsigned(i64 %a, i64 %b) { |
entry: |
@@ -197,6 +296,12 @@ entry: |
; CHECK: shl e |
; CHECK: test {{.*}}, 32 |
; CHECK: je |
+; |
+; OPTM1: shl64BitUnsigned: |
+; OPTM1: shld |
+; OPTM1: shl e |
+; OPTM1: test {{.*}}, 32 |
+; OPTM1: je |
define internal i64 @shr64BitSigned(i64 %a, i64 %b) { |
entry: |
@@ -209,6 +314,13 @@ entry: |
; CHECK: test {{.*}}, 32 |
; CHECK: je |
; CHECK: sar {{.*}}, 31 |
+; |
+; OPTM1: shr64BitSigned: |
+; OPTM1: shrd |
+; OPTM1: sar |
+; OPTM1: test {{.*}}, 32 |
+; OPTM1: je |
+; OPTM1: sar {{.*}}, 31 |
define internal i64 @shr64BitUnsigned(i64 %a, i64 %b) { |
entry: |
@@ -220,6 +332,12 @@ entry: |
; CHECK: shr |
; CHECK: test {{.*}}, 32 |
; CHECK: je |
+; |
+; OPTM1: shr64BitUnsigned: |
+; OPTM1: shrd |
+; OPTM1: shr |
+; OPTM1: test {{.*}}, 32 |
+; OPTM1: je |
define internal i64 @and64BitSigned(i64 %a, i64 %b) { |
entry: |
@@ -229,6 +347,10 @@ entry: |
; CHECK: and64BitSigned: |
; CHECK: and |
; CHECK: and |
+; |
+; OPTM1: and64BitSigned: |
+; OPTM1: and |
+; OPTM1: and |
define internal i64 @and64BitUnsigned(i64 %a, i64 %b) { |
entry: |
@@ -238,6 +360,10 @@ entry: |
; CHECK: and64BitUnsigned: |
; CHECK: and |
; CHECK: and |
+; |
+; OPTM1: and64BitUnsigned: |
+; OPTM1: and |
+; OPTM1: and |
define internal i64 @or64BitSigned(i64 %a, i64 %b) { |
entry: |
@@ -247,6 +373,10 @@ entry: |
; CHECK: or64BitSigned: |
; CHECK: or |
; CHECK: or |
+; |
+; OPTM1: or64BitSigned: |
+; OPTM1: or |
+; OPTM1: or |
define internal i64 @or64BitUnsigned(i64 %a, i64 %b) { |
entry: |
@@ -256,6 +386,10 @@ entry: |
; CHECK: or64BitUnsigned: |
; CHECK: or |
; CHECK: or |
+; |
+; OPTM1: or64BitUnsigned: |
+; OPTM1: or |
+; OPTM1: or |
define internal i64 @xor64BitSigned(i64 %a, i64 %b) { |
entry: |
@@ -265,6 +399,10 @@ entry: |
; CHECK: xor64BitSigned: |
; CHECK: xor |
; CHECK: xor |
+; |
+; OPTM1: xor64BitSigned: |
+; OPTM1: xor |
+; OPTM1: xor |
define internal i64 @xor64BitUnsigned(i64 %a, i64 %b) { |
entry: |
@@ -274,6 +412,10 @@ entry: |
; CHECK: xor64BitUnsigned: |
; CHECK: xor |
; CHECK: xor |
+; |
+; OPTM1: xor64BitUnsigned: |
+; OPTM1: xor |
+; OPTM1: xor |
define internal i32 @trunc64To32Signed(i64 %a) { |
entry: |
@@ -283,6 +425,10 @@ entry: |
; CHECK: trunc64To32Signed: |
; CHECK: mov eax, dword ptr [esp+4] |
; CHECK-NEXT: ret |
+; |
+; OPTM1: trunc64To32Signed: |
+; OPTM1: mov eax, dword ptr [esp+ |
+; OPTM1: ret |
define internal i32 @trunc64To16Signed(i64 %a) { |
entry: |
@@ -294,6 +440,11 @@ entry: |
; CHECK: mov eax, dword ptr [esp+4] |
; CHECK-NEXT: movsx eax, ax |
; CHECK-NEXT: ret |
+; |
+; OPTM1: trunc64To16Signed: |
+; OPTM1: mov eax, dword ptr [esp+ |
+; OPTM1: movsx eax, |
+; OPTM1: ret |
define internal i32 @trunc64To8Signed(i64 %a) { |
entry: |
@@ -305,6 +456,11 @@ entry: |
; CHECK: mov eax, dword ptr [esp+4] |
; CHECK-NEXT: movsx eax, al |
; CHECK-NEXT: ret |
+; |
+; OPTM1: trunc64To8Signed: |
+; OPTM1: mov eax, dword ptr [esp+ |
+; OPTM1: movsx eax, |
+; OPTM1: ret |
define internal i32 @trunc64To32Unsigned(i64 %a) { |
entry: |
@@ -314,6 +470,10 @@ entry: |
; CHECK: trunc64To32Unsigned: |
; CHECK: mov eax, dword ptr [esp+4] |
; CHECK-NEXT: ret |
+; |
+; OPTM1: trunc64To32Unsigned: |
+; OPTM1: mov eax, dword ptr [esp+ |
+; OPTM1: ret |
define internal i32 @trunc64To16Unsigned(i64 %a) { |
entry: |
@@ -325,6 +485,11 @@ entry: |
; CHECK: mov eax, dword ptr [esp+4] |
; CHECK-NEXT: movzx eax, ax |
; CHECK-NEXT: ret |
+; |
+; OPTM1: trunc64To16Unsigned: |
+; OPTM1: mov eax, dword ptr [esp+ |
+; OPTM1: movzx eax, |
+; OPTM1: ret |
define internal i32 @trunc64To8Unsigned(i64 %a) { |
entry: |
@@ -336,6 +501,11 @@ entry: |
; CHECK: mov eax, dword ptr [esp+4] |
; CHECK-NEXT: movzx eax, al |
; CHECK-NEXT: ret |
+; |
+; OPTM1: trunc64To8Unsigned: |
+; OPTM1: mov eax, dword ptr [esp+ |
+; OPTM1: movzx eax, |
+; OPTM1: ret |
define internal i32 @trunc64To1(i64 %a) { |
entry: |
@@ -348,6 +518,11 @@ entry: |
; CHECK: mov eax, dword ptr [esp+4] |
; CHECK: and eax, 1 |
; CHECK-NEXT: ret |
+; |
+; OPTM1: trunc64To1: |
+; OPTM1: mov eax, dword ptr [esp+ |
+; OPTM1: and eax, 1 |
+; OPTM1: ret |
define internal i64 @sext32To64(i32 %a) { |
entry: |
@@ -357,6 +532,10 @@ entry: |
; CHECK: sext32To64: |
; CHECK: mov |
; CHECK: sar {{.*}}, 31 |
+; |
+; OPTM1: sext32To64: |
+; OPTM1: mov |
+; OPTM1: sar {{.*}}, 31 |
define internal i64 @sext16To64(i32 %a) { |
entry: |
@@ -367,6 +546,10 @@ entry: |
; CHECK: sext16To64: |
; CHECK: movsx |
; CHECK: sar {{.*}}, 31 |
+; |
+; OPTM1: sext16To64: |
+; OPTM1: movsx |
+; OPTM1: sar {{.*}}, 31 |
define internal i64 @sext8To64(i32 %a) { |
entry: |
@@ -377,6 +560,10 @@ entry: |
; CHECK: sext8To64: |
; CHECK: movsx |
; CHECK: sar {{.*}}, 31 |
+; |
+; OPTM1: sext8To64: |
+; OPTM1: movsx |
+; OPTM1: sar {{.*}}, 31 |
define internal i64 @zext32To64(i32 %a) { |
entry: |
@@ -386,6 +573,10 @@ entry: |
; CHECK: zext32To64: |
; CHECK: mov |
; CHECK: mov {{.*}}, 0 |
+; |
+; OPTM1: zext32To64: |
+; OPTM1: mov |
+; OPTM1: mov {{.*}}, 0 |
define internal i64 @zext16To64(i32 %a) { |
entry: |
@@ -396,6 +587,10 @@ entry: |
; CHECK: zext16To64: |
; CHECK: movzx |
; CHECK: mov {{.*}}, 0 |
+; |
+; OPTM1: zext16To64: |
+; OPTM1: movzx |
+; OPTM1: mov {{.*}}, 0 |
define internal i64 @zext8To64(i32 %a) { |
entry: |
@@ -406,6 +601,10 @@ entry: |
; CHECK: zext8To64: |
; CHECK: movzx |
; CHECK: mov {{.*}}, 0 |
+; |
+; OPTM1: zext8To64: |
+; OPTM1: movzx |
+; OPTM1: mov {{.*}}, 0 |
define internal i64 @zext1To64(i32 %a) { |
entry: |
@@ -416,6 +615,10 @@ entry: |
; CHECK: zext1To64: |
; CHECK: movzx |
; CHECK: mov {{.*}}, 0 |
+; |
+; OPTM1: zext1To64: |
+; OPTM1: movzx |
+; OPTM1: mov {{.*}}, 0 |
define internal void @icmpEq64(i64 %a, i64 %b, i64 %c, i64 %d) { |
entry: |
@@ -444,6 +647,14 @@ if.end3: ; preds = %if.then2, %if.end |
; CHECK: jne |
; CHECK: jne |
; CHECK: call |
+; |
+; OPTM1: icmpEq64: |
+; OPTM1: jne |
+; OPTM1: jne |
+; OPTM1: call |
+; OPTM1: jne |
+; OPTM1: jne |
+; OPTM1: call |
declare void @func() |
@@ -474,6 +685,14 @@ if.end3: ; preds = %if.end, %if.then2 |
; CHECK: jne |
; CHECK: jne |
; CHECK: call |
+; |
+; OPTM1: icmpNe64: |
+; OPTM1: jne |
+; OPTM1: jne |
+; OPTM1: call |
+; OPTM1: jne |
+; OPTM1: jne |
+; OPTM1: call |
define internal void @icmpGt64(i64 %a, i64 %b, i64 %c, i64 %d) { |
entry: |
@@ -504,6 +723,16 @@ if.end3: ; preds = %if.then2, %if.end |
; CHECK: jl |
; CHECK: ja |
; CHECK: call |
+; |
+; OPTM1: icmpGt64: |
+; OPTM1: ja |
+; OPTM1: jb |
+; OPTM1: ja |
+; OPTM1: call |
+; OPTM1: jg |
+; OPTM1: jl |
+; OPTM1: ja |
+; OPTM1: call |
define internal void @icmpGe64(i64 %a, i64 %b, i64 %c, i64 %d) { |
entry: |
@@ -534,6 +763,16 @@ if.end3: ; preds = %if.end, %if.then2 |
; CHECK: jl |
; CHECK: jae |
; CHECK: call |
+; |
+; OPTM1: icmpGe64: |
+; OPTM1: ja |
+; OPTM1: jb |
+; OPTM1: jae |
+; OPTM1: call |
+; OPTM1: jg |
+; OPTM1: jl |
+; OPTM1: jae |
+; OPTM1: call |
define internal void @icmpLt64(i64 %a, i64 %b, i64 %c, i64 %d) { |
entry: |
@@ -564,6 +803,16 @@ if.end3: ; preds = %if.then2, %if.end |
; CHECK: jg |
; CHECK: jb |
; CHECK: call |
+; |
+; OPTM1: icmpLt64: |
+; OPTM1: jb |
+; OPTM1: ja |
+; OPTM1: jb |
+; OPTM1: call |
+; OPTM1: jl |
+; OPTM1: jg |
+; OPTM1: jb |
+; OPTM1: call |
define internal void @icmpLe64(i64 %a, i64 %b, i64 %c, i64 %d) { |
entry: |
@@ -594,6 +843,16 @@ if.end3: ; preds = %if.end, %if.then2 |
; CHECK: jg |
; CHECK: jbe |
; CHECK: call |
+; |
+; OPTM1: icmpLe64: |
+; OPTM1: jb |
+; OPTM1: ja |
+; OPTM1: jbe |
+; OPTM1: call |
+; OPTM1: jl |
+; OPTM1: jg |
+; OPTM1: jbe |
+; OPTM1: call |
define internal i32 @icmpEq64Bool(i64 %a, i64 %b) { |
entry: |
@@ -604,6 +863,10 @@ entry: |
; CHECK: icmpEq64Bool: |
; CHECK: jne |
; CHECK: jne |
+; |
+; OPTM1: icmpEq64Bool: |
+; OPTM1: jne |
+; OPTM1: jne |
define internal i32 @icmpNe64Bool(i64 %a, i64 %b) { |
entry: |
@@ -614,6 +877,10 @@ entry: |
; CHECK: icmpNe64Bool: |
; CHECK: jne |
; CHECK: jne |
+; |
+; OPTM1: icmpNe64Bool: |
+; OPTM1: jne |
+; OPTM1: jne |
define internal i32 @icmpSgt64Bool(i64 %a, i64 %b) { |
entry: |
@@ -627,6 +894,13 @@ entry: |
; CHECK: jl |
; CHECK: cmp |
; CHECK: ja |
+; |
+; OPTM1: icmpSgt64Bool: |
+; OPTM1: cmp |
+; OPTM1: jg |
+; OPTM1: jl |
+; OPTM1: cmp |
+; OPTM1: ja |
define internal i32 @icmpUgt64Bool(i64 %a, i64 %b) { |
entry: |
@@ -640,6 +914,13 @@ entry: |
; CHECK: jb |
; CHECK: cmp |
; CHECK: ja |
+; |
+; OPTM1: icmpUgt64Bool: |
+; OPTM1: cmp |
+; OPTM1: ja |
+; OPTM1: jb |
+; OPTM1: cmp |
+; OPTM1: ja |
define internal i32 @icmpSge64Bool(i64 %a, i64 %b) { |
entry: |
@@ -653,6 +934,13 @@ entry: |
; CHECK: jl |
; CHECK: cmp |
; CHECK: jae |
+; |
+; OPTM1: icmpSge64Bool: |
+; OPTM1: cmp |
+; OPTM1: jg |
+; OPTM1: jl |
+; OPTM1: cmp |
+; OPTM1: jae |
define internal i32 @icmpUge64Bool(i64 %a, i64 %b) { |
entry: |
@@ -666,6 +954,13 @@ entry: |
; CHECK: jb |
; CHECK: cmp |
; CHECK: jae |
+; |
+; OPTM1: icmpUge64Bool: |
+; OPTM1: cmp |
+; OPTM1: ja |
+; OPTM1: jb |
+; OPTM1: cmp |
+; OPTM1: jae |
define internal i32 @icmpSlt64Bool(i64 %a, i64 %b) { |
entry: |
@@ -679,6 +974,13 @@ entry: |
; CHECK: jg |
; CHECK: cmp |
; CHECK: jb |
+; |
+; OPTM1: icmpSlt64Bool: |
+; OPTM1: cmp |
+; OPTM1: jl |
+; OPTM1: jg |
+; OPTM1: cmp |
+; OPTM1: jb |
define internal i32 @icmpUlt64Bool(i64 %a, i64 %b) { |
entry: |
@@ -692,6 +994,13 @@ entry: |
; CHECK: ja |
; CHECK: cmp |
; CHECK: jb |
+; |
+; OPTM1: icmpUlt64Bool: |
+; OPTM1: cmp |
+; OPTM1: jb |
+; OPTM1: ja |
+; OPTM1: cmp |
+; OPTM1: jb |
define internal i32 @icmpSle64Bool(i64 %a, i64 %b) { |
entry: |
@@ -705,6 +1014,13 @@ entry: |
; CHECK: jg |
; CHECK: cmp |
; CHECK: jbe |
+; |
+; OPTM1: icmpSle64Bool: |
+; OPTM1: cmp |
+; OPTM1: jl |
+; OPTM1: jg |
+; OPTM1: cmp |
+; OPTM1: jbe |
define internal i32 @icmpUle64Bool(i64 %a, i64 %b) { |
entry: |
@@ -718,6 +1034,13 @@ entry: |
; CHECK: ja |
; CHECK: cmp |
; CHECK: jbe |
+; |
+; OPTM1: icmpUle64Bool: |
+; OPTM1: cmp |
+; OPTM1: jb |
+; OPTM1: ja |
+; OPTM1: cmp |
+; OPTM1: jbe |
define internal i64 @load64(i32 %a) { |
entry: |
@@ -729,6 +1052,10 @@ entry: |
; CHECK: mov e[[REGISTER:[a-z]+]], dword ptr [esp+4] |
; CHECK-NEXT: mov {{.*}}, dword ptr [e[[REGISTER]]] |
; CHECK-NEXT: mov {{.*}}, dword ptr [e[[REGISTER]]+4] |
+; |
+; OPTM1: load64: |
+; OPTM1: mov e{{..}}, dword ptr [e{{..}}] |
+; OPTM1: mov e{{..}}, dword ptr [e{{..}}+4] |
define internal void @store64(i32 %a, i64 %value) { |
entry: |
@@ -740,6 +1067,10 @@ entry: |
; CHECK: mov e[[REGISTER:[a-z]+]], dword ptr [esp+4] |
; CHECK: mov dword ptr [e[[REGISTER]]+4], |
; CHECK: mov dword ptr [e[[REGISTER]]], |
+; |
+; OPTM1: store64: |
+; OPTM1: mov dword ptr [e[[REGISTER:[a-z]+]]+4], |
+; OPTM1: mov dword ptr [e[[REGISTER]]], |
define internal void @store64Const(i32 %a) { |
entry: |
@@ -751,6 +1082,10 @@ entry: |
; CHECK: mov e[[REGISTER:[a-z]+]], dword ptr [esp+4] |
; CHECK: mov dword ptr [e[[REGISTER]]+4], 3735928559 |
; CHECK: mov dword ptr [e[[REGISTER]]], 305419896 |
+; |
+; OPTM1: store64Const: |
+; OPTM1: mov dword ptr [e[[REGISTER:[a-z]+]]+4], 3735928559 |
+; OPTM1: mov dword ptr [e[[REGISTER]]], 305419896 |
define internal i64 @select64VarVar(i64 %a, i64 %b) { |
entry: |
@@ -766,6 +1101,15 @@ entry: |
; CHECK: jb |
; CHECK: cmp |
; CHECK: jne |
+; |
+; OPTM1: select64VarVar: |
+; OPTM1: cmp |
+; OPTM1: jb |
+; OPTM1: ja |
+; OPTM1: cmp |
+; OPTM1: jb |
+; OPTM1: cmp |
+; OPTM1: jne |
define internal i64 @select64VarConst(i64 %a, i64 %b) { |
entry: |
@@ -781,6 +1125,15 @@ entry: |
; CHECK: jb |
; CHECK: cmp |
; CHECK: jne |
+; |
+; OPTM1: select64VarConst: |
+; OPTM1: cmp |
+; OPTM1: jb |
+; OPTM1: ja |
+; OPTM1: cmp |
+; OPTM1: jb |
+; OPTM1: cmp |
+; OPTM1: jne |
define internal i64 @select64ConstVar(i64 %a, i64 %b) { |
entry: |
@@ -796,6 +1149,15 @@ entry: |
; CHECK: jb |
; CHECK: cmp |
; CHECK: jne |
+; |
+; OPTM1: select64ConstVar: |
+; OPTM1: cmp |
+; OPTM1: jb |
+; OPTM1: ja |
+; OPTM1: cmp |
+; OPTM1: jb |
+; OPTM1: cmp |
+; OPTM1: jne |
; ERRORS-NOT: ICE translation error |
; DUMP-NOT: SZ |