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Side by Side Diff: tests_lit/llvm2ice_tests/convert.ll

Issue 265703002: Add Om1 lowering with no optimizations (Closed) Base URL: https://gerrit.chromium.org/gerrit/p/native_client/pnacl-subzero.git@master
Patch Set: Merge changed from Karl's committed CL Created 6 years, 7 months ago
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1 ; RUIN: %llvm2ice %s | FileCheck %s 1 ; Simple test of signed and unsigned integer conversions.
2 ; RUIN: %llvm2ice --verbose none %s | FileCheck --check-prefix=ERRORS %s 2
3 ; RUIN: %llvm2ice -O2 --verbose none %s | FileCheck %s
4 ; RUN: %llvm2ice -Om1 --verbose none %s | FileCheck --check-prefix=OPTM1 %s
5 ; RUN: %llvm2ice --verbose none %s | FileCheck --check-prefix=ERRORS %s
3 ; RUN: %llvm2iceinsts %s | %szdiff %s | FileCheck --check-prefix=DUMP %s 6 ; RUN: %llvm2iceinsts %s | %szdiff %s | FileCheck --check-prefix=DUMP %s
4 ; RUN: %llvm2iceinsts --pnacl %s | %szdiff %s \ 7 ; RUN: %llvm2iceinsts --pnacl %s | %szdiff %s \
5 ; RUN: | FileCheck --check-prefix=DUMP %s 8 ; RUN: | FileCheck --check-prefix=DUMP %s
6 9
7 @i8v = global [1 x i8] zeroinitializer, align 1 10 @i8v = global [1 x i8] zeroinitializer, align 1
8 @i16v = global [2 x i8] zeroinitializer, align 2 11 @i16v = global [2 x i8] zeroinitializer, align 2
9 @i32v = global [4 x i8] zeroinitializer, align 4 12 @i32v = global [4 x i8] zeroinitializer, align 4
10 @i64v = global [8 x i8] zeroinitializer, align 8 13 @i64v = global [8 x i8] zeroinitializer, align 8
11 @u8v = global [1 x i8] zeroinitializer, align 1 14 @u8v = global [1 x i8] zeroinitializer, align 1
12 @u16v = global [2 x i8] zeroinitializer, align 2 15 @u16v = global [2 x i8] zeroinitializer, align 2
13 @u32v = global [4 x i8] zeroinitializer, align 4 16 @u32v = global [4 x i8] zeroinitializer, align 4
14 @u64v = global [8 x i8] zeroinitializer, align 8 17 @u64v = global [8 x i8] zeroinitializer, align 8
15 18
16 define void @from_int8() { 19 define void @from_int8() {
17 entry: 20 entry:
18 %__0 = bitcast [1 x i8]* @i8v to i8* 21 %__0 = bitcast [1 x i8]* @i8v to i8*
19 %v0 = load i8* %__0, align 1 22 %v0 = load i8* %__0, align 1
20 %v1 = sext i8 %v0 to i16 23 %v1 = sext i8 %v0 to i16
21 %__3 = bitcast [2 x i8]* @i16v to i16* 24 %__3 = bitcast [2 x i8]* @i16v to i16*
22 store i16 %v1, i16* %__3, align 1 25 store i16 %v1, i16* %__3, align 1
23 %v2 = sext i8 %v0 to i32 26 %v2 = sext i8 %v0 to i32
24 %__5 = bitcast [4 x i8]* @i32v to i32* 27 %__5 = bitcast [4 x i8]* @i32v to i32*
25 store i32 %v2, i32* %__5, align 1 28 store i32 %v2, i32* %__5, align 1
26 %v3 = sext i8 %v0 to i64 29 %v3 = sext i8 %v0 to i64
27 %__7 = bitcast [8 x i8]* @i64v to i64* 30 %__7 = bitcast [8 x i8]* @i64v to i64*
28 store i64 %v3, i64* %__7, align 1 31 store i64 %v3, i64* %__7, align 1
29 ret void 32 ret void
30 ; CHECK: mov al, byte ptr [
31 ; CHECK-NEXT: movsx cx, al
32 ; CHECK-NEXT: mov word ptr [
33 ; CHECK-NEXT: movsx ecx, al
34 ; CHECK-NEXT: mov dword ptr [
35 ; CHECK-NEXT: movsx ecx, al
36 ; CHECK-NEXT: sar eax, 31
37 ; CHECK-NEXT: mov dword ptr [i64v+4],
38 ; CHECK-NEXT: mov dword ptr [i64v],
39 } 33 }
34 ; CHECK: from_int8:
35 ; CHECK: mov al, byte ptr [
36 ; CHECK-NEXT: movsx cx, al
37 ; CHECK-NEXT: mov word ptr [
38 ; CHECK-NEXT: movsx ecx, al
39 ; CHECK-NEXT: mov dword ptr [
40 ; CHECK-NEXT: movsx ecx, al
41 ; CHECK-NEXT: sar eax, 31
42 ; CHECK-NEXT: mov dword ptr [i64v+4],
43 ; CHECK-NEXT: mov dword ptr [i64v],
44 ;
45 ; OPTM1: from_int8:
46 ; OPTM1: mov {{.*}}, byte ptr [
47 ; OPTM1: movsx
48 ; OPTM1: mov word ptr [
49 ; OPTM1: movsx
50 ; OPTM1: mov dword ptr [
51 ; OPTM1: movsx
52 ; OPTM1: sar {{.*}}, 31
53 ; OPTM1: i64v
40 54
41 define void @from_int16() { 55 define void @from_int16() {
42 entry: 56 entry:
43 %__0 = bitcast [2 x i8]* @i16v to i16* 57 %__0 = bitcast [2 x i8]* @i16v to i16*
44 %v0 = load i16* %__0, align 1 58 %v0 = load i16* %__0, align 1
45 %v1 = trunc i16 %v0 to i8 59 %v1 = trunc i16 %v0 to i8
46 %__3 = bitcast [1 x i8]* @i8v to i8* 60 %__3 = bitcast [1 x i8]* @i8v to i8*
47 store i8 %v1, i8* %__3, align 1 61 store i8 %v1, i8* %__3, align 1
48 %v2 = sext i16 %v0 to i32 62 %v2 = sext i16 %v0 to i32
49 %__5 = bitcast [4 x i8]* @i32v to i32* 63 %__5 = bitcast [4 x i8]* @i32v to i32*
50 store i32 %v2, i32* %__5, align 1 64 store i32 %v2, i32* %__5, align 1
51 %v3 = sext i16 %v0 to i64 65 %v3 = sext i16 %v0 to i64
52 %__7 = bitcast [8 x i8]* @i64v to i64* 66 %__7 = bitcast [8 x i8]* @i64v to i64*
53 store i64 %v3, i64* %__7, align 1 67 store i64 %v3, i64* %__7, align 1
54 ret void 68 ret void
55 ; CHECK: mov ax, word ptr [
56 ; CHECK-NEXT: mov cx, ax
57 ; CHECK-NEXT: mov byte ptr [
58 ; CHECK-NEXT: movsx ecx, ax
59 ; CHECK-NEXT: mov dword ptr [
60 ; CHECK-NEXT: movsx ecx, ax
61 ; CHECK-NEXT: sar eax, 31
62 ; CHECK-NEXT: mov dword ptr [i64v+4],
63 ; CHECK-NEXT: mov dword ptr [i64v],
64 } 69 }
70 ; CHECK: from_int16:
71 ; CHECK: mov ax, word ptr [
72 ; CHECK-NEXT: mov cx, ax
73 ; CHECK-NEXT: mov byte ptr [
74 ; CHECK-NEXT: movsx ecx, ax
75 ; CHECK-NEXT: mov dword ptr [
76 ; CHECK-NEXT: movsx ecx, ax
77 ; CHECK-NEXT: sar eax, 31
78 ; CHECK-NEXT: mov dword ptr [i64v+4],
79 ; CHECK-NEXT: mov dword ptr [i64v],
80 ;
81 ; OPTM1: from_int16:
82 ; OPTM1: mov {{.*}}, word ptr [
83 ; OPTM1: i8v
84 ; OPTM1: movsx
85 ; OPTM1: i32v
86 ; OPTM1: movsx
87 ; OPTM1: sar {{.*}}, 31
88 ; OPTM1: i64v
65 89
66 define void @from_int32() { 90 define void @from_int32() {
67 entry: 91 entry:
68 %__0 = bitcast [4 x i8]* @i32v to i32* 92 %__0 = bitcast [4 x i8]* @i32v to i32*
69 %v0 = load i32* %__0, align 1 93 %v0 = load i32* %__0, align 1
70 %v1 = trunc i32 %v0 to i8 94 %v1 = trunc i32 %v0 to i8
71 %__3 = bitcast [1 x i8]* @i8v to i8* 95 %__3 = bitcast [1 x i8]* @i8v to i8*
72 store i8 %v1, i8* %__3, align 1 96 store i8 %v1, i8* %__3, align 1
73 %v2 = trunc i32 %v0 to i16 97 %v2 = trunc i32 %v0 to i16
74 %__5 = bitcast [2 x i8]* @i16v to i16* 98 %__5 = bitcast [2 x i8]* @i16v to i16*
75 store i16 %v2, i16* %__5, align 1 99 store i16 %v2, i16* %__5, align 1
76 %v3 = sext i32 %v0 to i64 100 %v3 = sext i32 %v0 to i64
77 %__7 = bitcast [8 x i8]* @i64v to i64* 101 %__7 = bitcast [8 x i8]* @i64v to i64*
78 store i64 %v3, i64* %__7, align 1 102 store i64 %v3, i64* %__7, align 1
79 ret void 103 ret void
80 ; CHECK: mov eax, dword ptr [
81 ; CHECK-NEXT: mov ecx, eax
82 ; CHECK-NEXT: mov byte ptr [
83 ; CHECK-NEXT: mov ecx, eax
84 ; CHECK-NEXT: mov word ptr [
85 ; CHECK-NEXT: mov ecx, eax
86 ; CHECK-NEXT: sar eax, 31
87 ; CHECK-NEXT: mov dword ptr [i64v+4],
88 ; CHECK-NEXT: mov dword ptr [i64v],
89 } 104 }
105 ; CHECK: from_int32:
106 ; CHECK: mov eax, dword ptr [
107 ; CHECK-NEXT: mov ecx, eax
108 ; CHECK-NEXT: mov byte ptr [
109 ; CHECK-NEXT: mov ecx, eax
110 ; CHECK-NEXT: mov word ptr [
111 ; CHECK-NEXT: mov ecx, eax
112 ; CHECK-NEXT: sar eax, 31
113 ; CHECK-NEXT: mov dword ptr [i64v+4],
114 ; CHECK-NEXT: mov dword ptr [i64v],
115 ;
116 ; OPTM1: from_int32:
117 ; OPTM1: i32v
118 ; OPTM1: i8v
119 ; OPTM1: i16v
120 ; OPTM1: sar {{.*}}, 31
121 ; OPTM1: i64v
90 122
91 define void @from_int64() { 123 define void @from_int64() {
92 entry: 124 entry:
93 %__0 = bitcast [8 x i8]* @i64v to i64* 125 %__0 = bitcast [8 x i8]* @i64v to i64*
94 %v0 = load i64* %__0, align 1 126 %v0 = load i64* %__0, align 1
95 %v1 = trunc i64 %v0 to i8 127 %v1 = trunc i64 %v0 to i8
96 %__3 = bitcast [1 x i8]* @i8v to i8* 128 %__3 = bitcast [1 x i8]* @i8v to i8*
97 store i8 %v1, i8* %__3, align 1 129 store i8 %v1, i8* %__3, align 1
98 %v2 = trunc i64 %v0 to i16 130 %v2 = trunc i64 %v0 to i16
99 %__5 = bitcast [2 x i8]* @i16v to i16* 131 %__5 = bitcast [2 x i8]* @i16v to i16*
100 store i16 %v2, i16* %__5, align 1 132 store i16 %v2, i16* %__5, align 1
101 %v3 = trunc i64 %v0 to i32 133 %v3 = trunc i64 %v0 to i32
102 %__7 = bitcast [4 x i8]* @i32v to i32* 134 %__7 = bitcast [4 x i8]* @i32v to i32*
103 store i32 %v3, i32* %__7, align 1 135 store i32 %v3, i32* %__7, align 1
104 ret void 136 ret void
105 ; CHECK: mov eax, dword ptr [
106 ; CHECK-NEXT: mov ecx, eax
107 ; CHECK-NEXT: mov byte ptr [
108 ; CHECK-NEXT: mov ecx, eax
109 ; CHECK-NEXT: mov word ptr [
110 ; CHECK-NEXT: mov dword ptr [
111 } 137 }
138 ; CHECK: from_int64:
139 ; CHECK: mov eax, dword ptr [
140 ; CHECK-NEXT: mov ecx, eax
141 ; CHECK-NEXT: mov byte ptr [
142 ; CHECK-NEXT: mov ecx, eax
143 ; CHECK-NEXT: mov word ptr [
144 ; CHECK-NEXT: mov dword ptr [
145 ;
146 ; OPTM1: from_int64:
147 ; OPTM1: i64v
148 ; OPTM1: i8v
149 ; OPTM1: i16v
150 ; OPTM1: i32v
112 151
113 define void @from_uint8() { 152 define void @from_uint8() {
114 entry: 153 entry:
115 %__0 = bitcast [1 x i8]* @u8v to i8* 154 %__0 = bitcast [1 x i8]* @u8v to i8*
116 %v0 = load i8* %__0, align 1 155 %v0 = load i8* %__0, align 1
117 %v1 = zext i8 %v0 to i16 156 %v1 = zext i8 %v0 to i16
118 %__3 = bitcast [2 x i8]* @i16v to i16* 157 %__3 = bitcast [2 x i8]* @i16v to i16*
119 store i16 %v1, i16* %__3, align 1 158 store i16 %v1, i16* %__3, align 1
120 %v2 = zext i8 %v0 to i32 159 %v2 = zext i8 %v0 to i32
121 %__5 = bitcast [4 x i8]* @i32v to i32* 160 %__5 = bitcast [4 x i8]* @i32v to i32*
122 store i32 %v2, i32* %__5, align 1 161 store i32 %v2, i32* %__5, align 1
123 %v3 = zext i8 %v0 to i64 162 %v3 = zext i8 %v0 to i64
124 %__7 = bitcast [8 x i8]* @i64v to i64* 163 %__7 = bitcast [8 x i8]* @i64v to i64*
125 store i64 %v3, i64* %__7, align 1 164 store i64 %v3, i64* %__7, align 1
126 ret void 165 ret void
127 ; CHECK: mov al, byte ptr [
128 ; CHECK-NEXT: movzx cx, al
129 ; CHECK-NEXT: mov word ptr [
130 ; CHECK-NEXT: movzx ecx, al
131 ; CHECK-NEXT: mov dword ptr [
132 ; CHECK-NEXT: movzx eax, al
133 ; CHECK-NEXT: mov ecx, 0
134 ; CHECK-NEXT: mov dword ptr [i64v+4],
135 ; CHECK-NEXT: mov dword ptr [i64v],
136 } 166 }
167 ; CHECK: from_uint8:
168 ; CHECK: mov al, byte ptr [
169 ; CHECK-NEXT: movzx cx, al
170 ; CHECK-NEXT: mov word ptr [
171 ; CHECK-NEXT: movzx ecx, al
172 ; CHECK-NEXT: mov dword ptr [
173 ; CHECK-NEXT: movzx eax, al
174 ; CHECK-NEXT: mov ecx, 0
175 ; CHECK-NEXT: mov dword ptr [i64v+4],
176 ; CHECK-NEXT: mov dword ptr [i64v],
177 ;
178 ; OPTM1: from_uint8:
179 ; OPTM1: u8v
180 ; OPTM1: movzx
181 ; OPTM1: i16v
182 ; OPTM1: movzx
183 ; OPTM1: i32v
184 ; OPTM1: movzx
185 ; OPTM1: mov {{.*}}, 0
186 ; OPTM1: i64v
137 187
138 define void @from_uint16() { 188 define void @from_uint16() {
139 entry: 189 entry:
140 %__0 = bitcast [2 x i8]* @u16v to i16* 190 %__0 = bitcast [2 x i8]* @u16v to i16*
141 %v0 = load i16* %__0, align 1 191 %v0 = load i16* %__0, align 1
142 %v1 = trunc i16 %v0 to i8 192 %v1 = trunc i16 %v0 to i8
143 %__3 = bitcast [1 x i8]* @i8v to i8* 193 %__3 = bitcast [1 x i8]* @i8v to i8*
144 store i8 %v1, i8* %__3, align 1 194 store i8 %v1, i8* %__3, align 1
145 %v2 = zext i16 %v0 to i32 195 %v2 = zext i16 %v0 to i32
146 %__5 = bitcast [4 x i8]* @i32v to i32* 196 %__5 = bitcast [4 x i8]* @i32v to i32*
147 store i32 %v2, i32* %__5, align 1 197 store i32 %v2, i32* %__5, align 1
148 %v3 = zext i16 %v0 to i64 198 %v3 = zext i16 %v0 to i64
149 %__7 = bitcast [8 x i8]* @i64v to i64* 199 %__7 = bitcast [8 x i8]* @i64v to i64*
150 store i64 %v3, i64* %__7, align 1 200 store i64 %v3, i64* %__7, align 1
151 ret void 201 ret void
152 ; CHECK: mov ax, word ptr [
153 ; CHECK-NEXT: mov cx, ax
154 ; CHECK-NEXT: mov byte ptr [
155 ; CHECK-NEXT: movzx ecx, ax
156 ; CHECK-NEXT: mov dword ptr [
157 ; CHECK-NEXT: movzx eax, ax
158 ; CHECK-NEXT: mov ecx, 0
159 ; CHECK-NEXT: mov dword ptr [i64v+4],
160 ; CHECK-NEXT: mov dword ptr [i64v],
161 } 202 }
203 ; CHECK: from_uint16:
204 ; CHECK: mov ax, word ptr [
205 ; CHECK-NEXT: mov cx, ax
206 ; CHECK-NEXT: mov byte ptr [
207 ; CHECK-NEXT: movzx ecx, ax
208 ; CHECK-NEXT: mov dword ptr [
209 ; CHECK-NEXT: movzx eax, ax
210 ; CHECK-NEXT: mov ecx, 0
211 ; CHECK-NEXT: mov dword ptr [i64v+4],
212 ; CHECK-NEXT: mov dword ptr [i64v],
213 ;
214 ; OPTM1: from_uint16:
215 ; OPTM1: u16v
216 ; OPTM1: i8v
217 ; OPTM1: movzx
218 ; OPTM1: i32v
219 ; OPTM1: movzx
220 ; OPTM1: mov {{.*}}, 0
221 ; OPTM1: i64v
162 222
163 define void @from_uint32() { 223 define void @from_uint32() {
164 entry: 224 entry:
165 %__0 = bitcast [4 x i8]* @u32v to i32* 225 %__0 = bitcast [4 x i8]* @u32v to i32*
166 %v0 = load i32* %__0, align 1 226 %v0 = load i32* %__0, align 1
167 %v1 = trunc i32 %v0 to i8 227 %v1 = trunc i32 %v0 to i8
168 %__3 = bitcast [1 x i8]* @i8v to i8* 228 %__3 = bitcast [1 x i8]* @i8v to i8*
169 store i8 %v1, i8* %__3, align 1 229 store i8 %v1, i8* %__3, align 1
170 %v2 = trunc i32 %v0 to i16 230 %v2 = trunc i32 %v0 to i16
171 %__5 = bitcast [2 x i8]* @i16v to i16* 231 %__5 = bitcast [2 x i8]* @i16v to i16*
172 store i16 %v2, i16* %__5, align 1 232 store i16 %v2, i16* %__5, align 1
173 %v3 = zext i32 %v0 to i64 233 %v3 = zext i32 %v0 to i64
174 %__7 = bitcast [8 x i8]* @i64v to i64* 234 %__7 = bitcast [8 x i8]* @i64v to i64*
175 store i64 %v3, i64* %__7, align 1 235 store i64 %v3, i64* %__7, align 1
176 ret void 236 ret void
177 ; CHECK: mov eax, dword ptr [
178 ; CHECK-NEXT: mov ecx, eax
179 ; CHECK-NEXT: mov byte ptr [
180 ; CHECK-NEXT: mov ecx, eax
181 ; CHECK-NEXT: mov word ptr [
182 ; CHECK-NEXT: mov ecx, 0
183 ; CHECK-NEXT: mov dword ptr [i64v+4],
184 ; CHECK-NEXT: mov dword ptr [i64v],
185 } 237 }
238 ; CHECK: from_uint32:
239 ; CHECK: mov eax, dword ptr [
240 ; CHECK-NEXT: mov ecx, eax
241 ; CHECK-NEXT: mov byte ptr [
242 ; CHECK-NEXT: mov ecx, eax
243 ; CHECK-NEXT: mov word ptr [
244 ; CHECK-NEXT: mov ecx, 0
245 ; CHECK-NEXT: mov dword ptr [i64v+4],
246 ; CHECK-NEXT: mov dword ptr [i64v],
247 ;
248 ; OPTM1: from_uint32:
249 ; OPTM1: u32v
250 ; OPTM1: i8v
251 ; OPTM1: i16v
252 ; OPTM1: mov {{.*}}, 0
253 ; OPTM1: i64v
186 254
187 define void @from_uint64() { 255 define void @from_uint64() {
188 entry: 256 entry:
189 %__0 = bitcast [8 x i8]* @u64v to i64* 257 %__0 = bitcast [8 x i8]* @u64v to i64*
190 %v0 = load i64* %__0, align 1 258 %v0 = load i64* %__0, align 1
191 %v1 = trunc i64 %v0 to i8 259 %v1 = trunc i64 %v0 to i8
192 %__3 = bitcast [1 x i8]* @i8v to i8* 260 %__3 = bitcast [1 x i8]* @i8v to i8*
193 store i8 %v1, i8* %__3, align 1 261 store i8 %v1, i8* %__3, align 1
194 %v2 = trunc i64 %v0 to i16 262 %v2 = trunc i64 %v0 to i16
195 %__5 = bitcast [2 x i8]* @i16v to i16* 263 %__5 = bitcast [2 x i8]* @i16v to i16*
196 store i16 %v2, i16* %__5, align 1 264 store i16 %v2, i16* %__5, align 1
197 %v3 = trunc i64 %v0 to i32 265 %v3 = trunc i64 %v0 to i32
198 %__7 = bitcast [4 x i8]* @i32v to i32* 266 %__7 = bitcast [4 x i8]* @i32v to i32*
199 store i32 %v3, i32* %__7, align 1 267 store i32 %v3, i32* %__7, align 1
200 ret void 268 ret void
201 ; CHECK: mov eax, dword ptr [
202 ; CHECK-NEXT: mov ecx, eax
203 ; CHECK-NEXT: mov byte ptr [
204 ; CHECK-NEXT: mov ecx, eax
205 ; CHECK-NEXT: mov word ptr [
206 ; CHECK-NEXT: mov dword ptr [
207 } 269 }
270 ; CHECK: from_uint64:
271 ; CHECK: mov eax, dword ptr [
272 ; CHECK-NEXT: mov ecx, eax
273 ; CHECK-NEXT: mov byte ptr [
274 ; CHECK-NEXT: mov ecx, eax
275 ; CHECK-NEXT: mov word ptr [
276 ; CHECK-NEXT: mov dword ptr [
277 ;
278 ; OPTM1: from_uint64:
279 ; OPTM1: u64v
280 ; OPTM1: i8v
281 ; OPTM1: i16v
282 ; OPTM1: i32v
208 283
209 ; ERRORS-NOT: ICE translation error 284 ; ERRORS-NOT: ICE translation error
210 ; DUMP-NOT: SZ 285 ; DUMP-NOT: SZ
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