Chromium Code Reviews| Index: src/compiler/arm/instruction-selector-arm.cc |
| diff --git a/src/compiler/arm/instruction-selector-arm.cc b/src/compiler/arm/instruction-selector-arm.cc |
| index 4ccb04e4641001a2839e2cbfcd4f69d0ba0450aa..68f432117d61028e915517398b77fc423b010cdb 100644 |
| --- a/src/compiler/arm/instruction-selector-arm.cc |
| +++ b/src/compiler/arm/instruction-selector-arm.cc |
| @@ -2286,178 +2286,109 @@ void InstructionSelector::VisitAtomicStore(Node* node) { |
| Emit(code, 0, nullptr, input_count, inputs); |
| } |
| -// TODO(bbudge) Macro-ize SIMD methods. |
| -void InstructionSelector::VisitCreateFloat32x4(Node* node) { |
| - ArmOperandGenerator g(this); |
| - Emit(kArmFloat32x4Splat, g.DefineAsRegister(node), g.Use(node->InputAt(0))); |
| -} |
| - |
| -void InstructionSelector::VisitFloat32x4ExtractLane(Node* node) { |
| - ArmOperandGenerator g(this); |
| - int32_t lane = OpParameter<int32_t>(node); |
| - Emit(kArmFloat32x4ExtractLane, g.DefineAsRegister(node), |
| - g.UseRegister(node->InputAt(0)), g.UseImmediate(lane)); |
| -} |
| - |
| -void InstructionSelector::VisitFloat32x4ReplaceLane(Node* node) { |
| - ArmOperandGenerator g(this); |
| - int32_t lane = OpParameter<int32_t>(node); |
| - Emit(kArmFloat32x4ReplaceLane, g.DefineAsRegister(node), |
| - g.UseRegister(node->InputAt(0)), g.UseImmediate(lane), |
| - g.Use(node->InputAt(1))); |
| -} |
| - |
| -void InstructionSelector::VisitFloat32x4FromInt32x4(Node* node) { |
| - ArmOperandGenerator g(this); |
| - Emit(kArmFloat32x4FromInt32x4, g.DefineAsRegister(node), |
| - g.UseRegister(node->InputAt(0))); |
| -} |
| - |
| -void InstructionSelector::VisitFloat32x4FromUint32x4(Node* node) { |
| - ArmOperandGenerator g(this); |
| - Emit(kArmFloat32x4FromUint32x4, g.DefineAsRegister(node), |
| - g.UseRegister(node->InputAt(0))); |
| -} |
| - |
| -void InstructionSelector::VisitFloat32x4Abs(Node* node) { |
| - ArmOperandGenerator g(this); |
| - Emit(kArmFloat32x4Abs, g.DefineAsRegister(node), |
| - g.UseRegister(node->InputAt(0))); |
| -} |
| - |
| -void InstructionSelector::VisitFloat32x4Neg(Node* node) { |
| - ArmOperandGenerator g(this); |
| - Emit(kArmFloat32x4Neg, g.DefineAsRegister(node), |
| - g.UseRegister(node->InputAt(0))); |
| -} |
| - |
| -void InstructionSelector::VisitFloat32x4Add(Node* node) { |
| - ArmOperandGenerator g(this); |
| - Emit(kArmFloat32x4Add, g.DefineAsRegister(node), |
| - g.UseRegister(node->InputAt(0)), g.UseRegister(node->InputAt(1))); |
| -} |
| - |
| -void InstructionSelector::VisitFloat32x4Sub(Node* node) { |
| - ArmOperandGenerator g(this); |
| - Emit(kArmFloat32x4Sub, g.DefineAsRegister(node), |
| - g.UseRegister(node->InputAt(0)), g.UseRegister(node->InputAt(1))); |
| -} |
| - |
| -void InstructionSelector::VisitFloat32x4Equal(Node* node) { |
| - ArmOperandGenerator g(this); |
| - Emit(kArmFloat32x4Eq, g.DefineAsRegister(node), |
| - g.UseRegister(node->InputAt(0)), g.UseRegister(node->InputAt(1))); |
| -} |
| - |
| -void InstructionSelector::VisitFloat32x4NotEqual(Node* node) { |
| - ArmOperandGenerator g(this); |
| - Emit(kArmFloat32x4Ne, g.DefineAsRegister(node), |
| - g.UseRegister(node->InputAt(0)), g.UseRegister(node->InputAt(1))); |
| -} |
| - |
| -void InstructionSelector::VisitCreateInt32x4(Node* node) { |
| - ArmOperandGenerator g(this); |
| - Emit(kArmInt32x4Splat, g.DefineAsRegister(node), g.Use(node->InputAt(0))); |
| -} |
| - |
| -void InstructionSelector::VisitInt32x4ExtractLane(Node* node) { |
| - ArmOperandGenerator g(this); |
| - int32_t lane = OpParameter<int32_t>(node); |
| - Emit(kArmInt32x4ExtractLane, g.DefineAsRegister(node), |
| - g.UseRegister(node->InputAt(0)), g.UseImmediate(lane)); |
| -} |
| - |
| -void InstructionSelector::VisitInt32x4ReplaceLane(Node* node) { |
| - ArmOperandGenerator g(this); |
| - int32_t lane = OpParameter<int32_t>(node); |
| - Emit(kArmInt32x4ReplaceLane, g.DefineAsRegister(node), |
| - g.UseRegister(node->InputAt(0)), g.UseImmediate(lane), |
| - g.Use(node->InputAt(1))); |
| -} |
| - |
| -void InstructionSelector::VisitInt32x4FromFloat32x4(Node* node) { |
| - ArmOperandGenerator g(this); |
| - Emit(kArmInt32x4FromFloat32x4, g.DefineAsRegister(node), |
| - g.UseRegister(node->InputAt(0))); |
| -} |
| - |
| -void InstructionSelector::VisitUint32x4FromFloat32x4(Node* node) { |
| - ArmOperandGenerator g(this); |
| - Emit(kArmUint32x4FromFloat32x4, g.DefineAsRegister(node), |
| - g.UseRegister(node->InputAt(0))); |
| -} |
| - |
| -void InstructionSelector::VisitInt32x4Neg(Node* node) { |
| - ArmOperandGenerator g(this); |
| - Emit(kArmInt32x4Neg, g.DefineAsRegister(node), |
| - g.UseRegister(node->InputAt(0))); |
| -} |
| - |
| -void InstructionSelector::VisitInt32x4Add(Node* node) { |
| - ArmOperandGenerator g(this); |
| - Emit(kArmInt32x4Add, g.DefineAsRegister(node), |
| - g.UseRegister(node->InputAt(0)), g.UseRegister(node->InputAt(1))); |
| -} |
| - |
| -void InstructionSelector::VisitInt32x4Sub(Node* node) { |
| - ArmOperandGenerator g(this); |
| - Emit(kArmInt32x4Sub, g.DefineAsRegister(node), |
| - g.UseRegister(node->InputAt(0)), g.UseRegister(node->InputAt(1))); |
| -} |
| - |
| -void InstructionSelector::VisitInt32x4Mul(Node* node) { |
| - ArmOperandGenerator g(this); |
| - Emit(kArmInt32x4Mul, g.DefineAsRegister(node), |
| - g.UseRegister(node->InputAt(0)), g.UseRegister(node->InputAt(1))); |
| -} |
| - |
| -void InstructionSelector::VisitInt32x4Min(Node* node) { |
| - ArmOperandGenerator g(this); |
| - Emit(kArmInt32x4Min, g.DefineAsRegister(node), |
| - g.UseRegister(node->InputAt(0)), g.UseRegister(node->InputAt(1))); |
| -} |
| - |
| -void InstructionSelector::VisitInt32x4Max(Node* node) { |
| - ArmOperandGenerator g(this); |
| - Emit(kArmInt32x4Max, g.DefineAsRegister(node), |
| - g.UseRegister(node->InputAt(0)), g.UseRegister(node->InputAt(1))); |
| -} |
| - |
| -void InstructionSelector::VisitInt32x4Equal(Node* node) { |
| - ArmOperandGenerator g(this); |
| - Emit(kArmInt32x4Eq, g.DefineAsRegister(node), g.UseRegister(node->InputAt(0)), |
| - g.UseRegister(node->InputAt(1))); |
| -} |
| - |
| -void InstructionSelector::VisitInt32x4NotEqual(Node* node) { |
| - ArmOperandGenerator g(this); |
| - Emit(kArmInt32x4Ne, g.DefineAsRegister(node), g.UseRegister(node->InputAt(0)), |
| - g.UseRegister(node->InputAt(1))); |
| -} |
| - |
| -void InstructionSelector::VisitInt32x4GreaterThan(Node* node) { |
| - ArmOperandGenerator g(this); |
| - Emit(kArmInt32x4Gt, g.DefineAsRegister(node), g.UseRegister(node->InputAt(0)), |
| - g.UseRegister(node->InputAt(1))); |
| -} |
| - |
| -void InstructionSelector::VisitInt32x4GreaterThanOrEqual(Node* node) { |
| - ArmOperandGenerator g(this); |
| - Emit(kArmInt32x4Ge, g.DefineAsRegister(node), g.UseRegister(node->InputAt(0)), |
| - g.UseRegister(node->InputAt(1))); |
| -} |
| - |
| -void InstructionSelector::VisitUint32x4GreaterThan(Node* node) { |
| - ArmOperandGenerator g(this); |
| - Emit(kArmUint32x4Gt, g.DefineAsRegister(node), |
| - g.UseRegister(node->InputAt(0)), g.UseRegister(node->InputAt(1))); |
| -} |
| - |
| -void InstructionSelector::VisitUint32x4GreaterThanOrEqual(Node* node) { |
| - ArmOperandGenerator g(this); |
| - Emit(kArmUint32x4Ge, g.DefineAsRegister(node), |
| - g.UseRegister(node->InputAt(0)), g.UseRegister(node->InputAt(1))); |
| -} |
| +#define SIMD_TYPE_LIST(V) \ |
| + V(Float32x4) \ |
| + V(Int32x4) \ |
| + V(Int16x8) \ |
| + V(Int8x16) |
| + |
| +#define SIMD_UNOP_LIST(V) \ |
| + V(Float32x4FromInt32x4) \ |
| + V(Float32x4FromUint32x4) \ |
| + V(Float32x4Abs) \ |
| + V(Float32x4Neg) \ |
| + V(Int32x4FromFloat32x4) \ |
| + V(Uint32x4FromFloat32x4) \ |
| + V(Int32x4Neg) \ |
| + V(Int16x8Neg) \ |
| + V(Int8x16Neg) |
| + |
| +#define SIMD_BINOP_LIST(V) \ |
| + V(Float32x4Add) \ |
| + V(Float32x4Sub) \ |
| + V(Float32x4Equal) \ |
| + V(Float32x4NotEqual) \ |
| + V(Int32x4Add) \ |
| + V(Int32x4Sub) \ |
| + V(Int32x4Mul) \ |
| + V(Int32x4Min) \ |
| + V(Int32x4Max) \ |
| + V(Int32x4Equal) \ |
| + V(Int32x4NotEqual) \ |
| + V(Int32x4GreaterThan) \ |
| + V(Int32x4GreaterThanOrEqual) \ |
| + V(Uint32x4GreaterThan) \ |
| + V(Uint32x4GreaterThanOrEqual) \ |
| + V(Int16x8Add) \ |
| + V(Int16x8Sub) \ |
| + V(Int16x8Mul) \ |
| + V(Int16x8Min) \ |
| + V(Int16x8Max) \ |
| + V(Int16x8Equal) \ |
| + V(Int16x8NotEqual) \ |
| + V(Int16x8GreaterThan) \ |
| + V(Int16x8GreaterThanOrEqual) \ |
| + V(Uint16x8GreaterThan) \ |
| + V(Uint16x8GreaterThanOrEqual) \ |
| + V(Int8x16Add) \ |
| + V(Int8x16Sub) \ |
| + V(Int8x16Mul) \ |
| + V(Int8x16Min) \ |
| + V(Int8x16Max) \ |
| + V(Int8x16Equal) \ |
| + V(Int8x16NotEqual) \ |
| + V(Int8x16GreaterThan) \ |
| + V(Int8x16GreaterThanOrEqual) \ |
| + V(Uint8x16GreaterThan) \ |
| + V(Uint8x16GreaterThanOrEqual) |
| + |
| +#define SIMD_VISIT_SPLAT(Type) \ |
| + void InstructionSelector::VisitCreate##Type(Node* node) { \ |
|
titzer
2017/01/30 21:01:25
Can you make these macros all call VisitRR or Visi
bbudge
2017/01/30 23:42:29
Done.
|
| + ArmOperandGenerator g(this); \ |
| + Emit(kArm##Type##Splat, g.DefineAsRegister(node), \ |
| + g.UseRegister(node->InputAt(0))); \ |
| + } |
| +SIMD_TYPE_LIST(SIMD_VISIT_SPLAT) |
| +#undef SIMD_VISIT_SPLAT |
| + |
| +#define SIMD_VISIT_EXTRACT_LANE(Type) \ |
| + void InstructionSelector::Visit##Type##ExtractLane(Node* node) { \ |
| + ArmOperandGenerator g(this); \ |
| + int32_t lane = OpParameter<int32_t>(node); \ |
| + Emit(kArm##Type##ExtractLane, g.DefineAsRegister(node), \ |
| + g.UseRegister(node->InputAt(0)), g.UseImmediate(lane)); \ |
| + } |
| +SIMD_TYPE_LIST(SIMD_VISIT_EXTRACT_LANE) |
| +#undef SIMD_VISIT_EXTRACT_LANE |
| + |
| +#define SIMD_VISIT_REPLACE_LANE(Type) \ |
| + void InstructionSelector::Visit##Type##ReplaceLane(Node* node) { \ |
| + ArmOperandGenerator g(this); \ |
| + int32_t lane = OpParameter<int32_t>(node); \ |
| + Emit(kArm##Type##ReplaceLane, g.DefineAsRegister(node), \ |
| + g.UseRegister(node->InputAt(0)), g.UseImmediate(lane), \ |
| + g.Use(node->InputAt(1))); \ |
| + } |
| +SIMD_TYPE_LIST(SIMD_VISIT_REPLACE_LANE) |
| +#undef SIMD_VISIT_REPLACE_LANE |
| + |
| +#define SIMD_VISIT_UNOP(Name) \ |
| + void InstructionSelector::Visit##Name(Node* node) { \ |
| + ArmOperandGenerator g(this); \ |
| + Emit(kArm##Name, g.DefineAsRegister(node), \ |
| + g.UseRegister(node->InputAt(0))); \ |
| + } |
| +SIMD_UNOP_LIST(SIMD_VISIT_UNOP) |
| +#undef SIMD_VISIT_UNOP |
| + |
| +#define SIMD_VISIT_BINOP(Name) \ |
| + void InstructionSelector::Visit##Name(Node* node) { \ |
| + ArmOperandGenerator g(this); \ |
| + Emit(kArm##Name, g.DefineAsRegister(node), \ |
| + g.UseRegister(node->InputAt(0)), g.UseRegister(node->InputAt(1))); \ |
| + } |
| +SIMD_BINOP_LIST(SIMD_VISIT_BINOP) |
| +#undef SIMD_VISIT_BINOP |
| void InstructionSelector::VisitSimd32x4Select(Node* node) { |
| ArmOperandGenerator g(this); |
| @@ -2466,190 +2397,6 @@ void InstructionSelector::VisitSimd32x4Select(Node* node) { |
| g.UseRegister(node->InputAt(2))); |
| } |
| -void InstructionSelector::VisitCreateInt16x8(Node* node) { |
| - ArmOperandGenerator g(this); |
| - Emit(kArmInt16x8Splat, g.DefineAsRegister(node), g.Use(node->InputAt(0))); |
| -} |
| - |
| -void InstructionSelector::VisitInt16x8ExtractLane(Node* node) { |
| - ArmOperandGenerator g(this); |
| - int32_t lane = OpParameter<int32_t>(node); |
| - Emit(kArmInt16x8ExtractLane, g.DefineAsRegister(node), |
| - g.UseRegister(node->InputAt(0)), g.UseImmediate(lane)); |
| -} |
| - |
| -void InstructionSelector::VisitInt16x8ReplaceLane(Node* node) { |
| - ArmOperandGenerator g(this); |
| - int32_t lane = OpParameter<int32_t>(node); |
| - Emit(kArmInt16x8ReplaceLane, g.DefineAsRegister(node), |
| - g.UseRegister(node->InputAt(0)), g.UseImmediate(lane), |
| - g.Use(node->InputAt(1))); |
| -} |
| - |
| -void InstructionSelector::VisitInt16x8Neg(Node* node) { |
| - ArmOperandGenerator g(this); |
| - Emit(kArmInt16x8Neg, g.DefineAsRegister(node), |
| - g.UseRegister(node->InputAt(0))); |
| -} |
| - |
| -void InstructionSelector::VisitInt16x8Add(Node* node) { |
| - ArmOperandGenerator g(this); |
| - Emit(kArmInt16x8Add, g.DefineAsRegister(node), |
| - g.UseRegister(node->InputAt(0)), g.UseRegister(node->InputAt(1))); |
| -} |
| - |
| -void InstructionSelector::VisitInt16x8Sub(Node* node) { |
| - ArmOperandGenerator g(this); |
| - Emit(kArmInt16x8Sub, g.DefineAsRegister(node), |
| - g.UseRegister(node->InputAt(0)), g.UseRegister(node->InputAt(1))); |
| -} |
| - |
| -void InstructionSelector::VisitInt16x8Mul(Node* node) { |
| - ArmOperandGenerator g(this); |
| - Emit(kArmInt16x8Mul, g.DefineAsRegister(node), |
| - g.UseRegister(node->InputAt(0)), g.UseRegister(node->InputAt(1))); |
| -} |
| - |
| -void InstructionSelector::VisitInt16x8Min(Node* node) { |
| - ArmOperandGenerator g(this); |
| - Emit(kArmInt16x8Min, g.DefineAsRegister(node), |
| - g.UseRegister(node->InputAt(0)), g.UseRegister(node->InputAt(1))); |
| -} |
| - |
| -void InstructionSelector::VisitInt16x8Max(Node* node) { |
| - ArmOperandGenerator g(this); |
| - Emit(kArmInt16x8Max, g.DefineAsRegister(node), |
| - g.UseRegister(node->InputAt(0)), g.UseRegister(node->InputAt(1))); |
| -} |
| - |
| -void InstructionSelector::VisitInt16x8Equal(Node* node) { |
| - ArmOperandGenerator g(this); |
| - Emit(kArmInt16x8Eq, g.DefineAsRegister(node), g.UseRegister(node->InputAt(0)), |
| - g.UseRegister(node->InputAt(1))); |
| -} |
| - |
| -void InstructionSelector::VisitInt16x8NotEqual(Node* node) { |
| - ArmOperandGenerator g(this); |
| - Emit(kArmInt16x8Ne, g.DefineAsRegister(node), g.UseRegister(node->InputAt(0)), |
| - g.UseRegister(node->InputAt(1))); |
| -} |
| - |
| -void InstructionSelector::VisitInt16x8GreaterThan(Node* node) { |
| - ArmOperandGenerator g(this); |
| - Emit(kArmInt16x8Gt, g.DefineAsRegister(node), g.UseRegister(node->InputAt(0)), |
| - g.UseRegister(node->InputAt(1))); |
| -} |
| - |
| -void InstructionSelector::VisitInt16x8GreaterThanOrEqual(Node* node) { |
| - ArmOperandGenerator g(this); |
| - Emit(kArmInt16x8Ge, g.DefineAsRegister(node), g.UseRegister(node->InputAt(0)), |
| - g.UseRegister(node->InputAt(1))); |
| -} |
| - |
| -void InstructionSelector::VisitUint16x8GreaterThan(Node* node) { |
| - ArmOperandGenerator g(this); |
| - Emit(kArmUint16x8Gt, g.DefineAsRegister(node), |
| - g.UseRegister(node->InputAt(0)), g.UseRegister(node->InputAt(1))); |
| -} |
| - |
| -void InstructionSelector::VisitUint16x8GreaterThanOrEqual(Node* node) { |
| - ArmOperandGenerator g(this); |
| - Emit(kArmUint16x8Ge, g.DefineAsRegister(node), |
| - g.UseRegister(node->InputAt(0)), g.UseRegister(node->InputAt(1))); |
| -} |
| - |
| -void InstructionSelector::VisitCreateInt8x16(Node* node) { |
| - ArmOperandGenerator g(this); |
| - Emit(kArmInt8x16Splat, g.DefineAsRegister(node), g.Use(node->InputAt(0))); |
| -} |
| - |
| -void InstructionSelector::VisitInt8x16ExtractLane(Node* node) { |
| - ArmOperandGenerator g(this); |
| - int32_t lane = OpParameter<int32_t>(node); |
| - Emit(kArmInt8x16ExtractLane, g.DefineAsRegister(node), |
| - g.UseRegister(node->InputAt(0)), g.UseImmediate(lane)); |
| -} |
| - |
| -void InstructionSelector::VisitInt8x16ReplaceLane(Node* node) { |
| - ArmOperandGenerator g(this); |
| - int32_t lane = OpParameter<int32_t>(node); |
| - Emit(kArmInt8x16ReplaceLane, g.DefineAsRegister(node), |
| - g.UseRegister(node->InputAt(0)), g.UseImmediate(lane), |
| - g.Use(node->InputAt(1))); |
| -} |
| - |
| -void InstructionSelector::VisitInt8x16Neg(Node* node) { |
| - ArmOperandGenerator g(this); |
| - Emit(kArmInt8x16Neg, g.DefineAsRegister(node), |
| - g.UseRegister(node->InputAt(0))); |
| -} |
| - |
| -void InstructionSelector::VisitInt8x16Add(Node* node) { |
| - ArmOperandGenerator g(this); |
| - Emit(kArmInt8x16Add, g.DefineAsRegister(node), |
| - g.UseRegister(node->InputAt(0)), g.UseRegister(node->InputAt(1))); |
| -} |
| - |
| -void InstructionSelector::VisitInt8x16Sub(Node* node) { |
| - ArmOperandGenerator g(this); |
| - Emit(kArmInt8x16Sub, g.DefineAsRegister(node), |
| - g.UseRegister(node->InputAt(0)), g.UseRegister(node->InputAt(1))); |
| -} |
| - |
| -void InstructionSelector::VisitInt8x16Mul(Node* node) { |
| - ArmOperandGenerator g(this); |
| - Emit(kArmInt8x16Mul, g.DefineAsRegister(node), |
| - g.UseRegister(node->InputAt(0)), g.UseRegister(node->InputAt(1))); |
| -} |
| - |
| -void InstructionSelector::VisitInt8x16Min(Node* node) { |
| - ArmOperandGenerator g(this); |
| - Emit(kArmInt8x16Min, g.DefineAsRegister(node), |
| - g.UseRegister(node->InputAt(0)), g.UseRegister(node->InputAt(1))); |
| -} |
| - |
| -void InstructionSelector::VisitInt8x16Max(Node* node) { |
| - ArmOperandGenerator g(this); |
| - Emit(kArmInt8x16Max, g.DefineAsRegister(node), |
| - g.UseRegister(node->InputAt(0)), g.UseRegister(node->InputAt(1))); |
| -} |
| - |
| -void InstructionSelector::VisitInt8x16Equal(Node* node) { |
| - ArmOperandGenerator g(this); |
| - Emit(kArmInt8x16Eq, g.DefineAsRegister(node), g.UseRegister(node->InputAt(0)), |
| - g.UseRegister(node->InputAt(1))); |
| -} |
| - |
| -void InstructionSelector::VisitInt8x16NotEqual(Node* node) { |
| - ArmOperandGenerator g(this); |
| - Emit(kArmInt8x16Ne, g.DefineAsRegister(node), g.UseRegister(node->InputAt(0)), |
| - g.UseRegister(node->InputAt(1))); |
| -} |
| - |
| -void InstructionSelector::VisitInt8x16GreaterThan(Node* node) { |
| - ArmOperandGenerator g(this); |
| - Emit(kArmInt8x16Gt, g.DefineAsRegister(node), g.UseRegister(node->InputAt(0)), |
| - g.UseRegister(node->InputAt(1))); |
| -} |
| - |
| -void InstructionSelector::VisitInt8x16GreaterThanOrEqual(Node* node) { |
| - ArmOperandGenerator g(this); |
| - Emit(kArmInt8x16Ge, g.DefineAsRegister(node), g.UseRegister(node->InputAt(0)), |
| - g.UseRegister(node->InputAt(1))); |
| -} |
| - |
| -void InstructionSelector::VisitUint8x16GreaterThan(Node* node) { |
| - ArmOperandGenerator g(this); |
| - Emit(kArmUint8x16Gt, g.DefineAsRegister(node), |
| - g.UseRegister(node->InputAt(0)), g.UseRegister(node->InputAt(1))); |
| -} |
| - |
| -void InstructionSelector::VisitUint8x16GreaterThanOrEqual(Node* node) { |
| - ArmOperandGenerator g(this); |
| - Emit(kArmUint8x16Ge, g.DefineAsRegister(node), |
| - g.UseRegister(node->InputAt(0)), g.UseRegister(node->InputAt(1))); |
| -} |
| - |
| // static |
| MachineOperatorBuilder::Flags |
| InstructionSelector::SupportedMachineOperatorFlags() { |