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Side by Side Diff: src/compiler/mips64/instruction-selector-mips64.cc

Issue 2649703002: [Atomics] Make Atomics.compareExchange a builtin using TF (Closed)
Patch Set: rebase and move cmpxchg to builtins-sharedarraybuffer-gen.cc Created 3 years, 9 months ago
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1 // Copyright 2014 the V8 project authors. All rights reserved. 1 // Copyright 2014 the V8 project authors. All rights reserved.
2 // Use of this source code is governed by a BSD-style license that can be 2 // Use of this source code is governed by a BSD-style license that can be
3 // found in the LICENSE file. 3 // found in the LICENSE file.
4 4
5 #include "src/base/adapters.h" 5 #include "src/base/adapters.h"
6 #include "src/base/bits.h" 6 #include "src/base/bits.h"
7 #include "src/compiler/instruction-selector-impl.h" 7 #include "src/compiler/instruction-selector-impl.h"
8 #include "src/compiler/node-matchers.h" 8 #include "src/compiler/node-matchers.h"
9 #include "src/compiler/node-properties.h" 9 #include "src/compiler/node-properties.h"
10 10
(...skipping 2620 matching lines...) Expand 10 before | Expand all | Expand 10 after
2631 Emit(kMips64Dadd | AddressingModeField::encode(kMode_None), addr_reg, 2631 Emit(kMips64Dadd | AddressingModeField::encode(kMode_None), addr_reg,
2632 g.UseRegister(index), g.UseRegister(base)); 2632 g.UseRegister(index), g.UseRegister(base));
2633 // Emit desired store opcode, using temp addr_reg. 2633 // Emit desired store opcode, using temp addr_reg.
2634 Emit(opcode | AddressingModeField::encode(kMode_MRI), g.NoOutput(), 2634 Emit(opcode | AddressingModeField::encode(kMode_MRI), g.NoOutput(),
2635 addr_reg, g.TempImmediate(0), g.UseRegisterOrImmediateZero(value)); 2635 addr_reg, g.TempImmediate(0), g.UseRegisterOrImmediateZero(value));
2636 } 2636 }
2637 } 2637 }
2638 2638
2639 void InstructionSelector::VisitAtomicExchange(Node* node) { UNIMPLEMENTED(); } 2639 void InstructionSelector::VisitAtomicExchange(Node* node) { UNIMPLEMENTED(); }
2640 2640
2641 void InstructionSelector::VisitAtomicCompareExchange(Node* node) {
2642 UNIMPLEMENTED();
2643 }
2644
2641 // static 2645 // static
2642 MachineOperatorBuilder::Flags 2646 MachineOperatorBuilder::Flags
2643 InstructionSelector::SupportedMachineOperatorFlags() { 2647 InstructionSelector::SupportedMachineOperatorFlags() {
2644 MachineOperatorBuilder::Flags flags = MachineOperatorBuilder::kNoFlags; 2648 MachineOperatorBuilder::Flags flags = MachineOperatorBuilder::kNoFlags;
2645 return flags | MachineOperatorBuilder::kWord32Ctz | 2649 return flags | MachineOperatorBuilder::kWord32Ctz |
2646 MachineOperatorBuilder::kWord64Ctz | 2650 MachineOperatorBuilder::kWord64Ctz |
2647 MachineOperatorBuilder::kWord32Popcnt | 2651 MachineOperatorBuilder::kWord32Popcnt |
2648 MachineOperatorBuilder::kWord64Popcnt | 2652 MachineOperatorBuilder::kWord64Popcnt |
2649 MachineOperatorBuilder::kWord32ShiftIsSafe | 2653 MachineOperatorBuilder::kWord32ShiftIsSafe |
2650 MachineOperatorBuilder::kInt32DivIsSafe | 2654 MachineOperatorBuilder::kInt32DivIsSafe |
(...skipping 19 matching lines...) Expand all
2670 } else { 2674 } else {
2671 DCHECK(kArchVariant == kMips64r2); 2675 DCHECK(kArchVariant == kMips64r2);
2672 return MachineOperatorBuilder::AlignmentRequirements:: 2676 return MachineOperatorBuilder::AlignmentRequirements::
2673 NoUnalignedAccessSupport(); 2677 NoUnalignedAccessSupport();
2674 } 2678 }
2675 } 2679 }
2676 2680
2677 } // namespace compiler 2681 } // namespace compiler
2678 } // namespace internal 2682 } // namespace internal
2679 } // namespace v8 2683 } // namespace v8
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