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Side by Side Diff: src/compiler/mips/instruction-selector-mips.cc

Issue 2649703002: [Atomics] Make Atomics.compareExchange a builtin using TF (Closed)
Patch Set: rebase and move cmpxchg to builtins-sharedarraybuffer-gen.cc Created 3 years, 9 months ago
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1 // Copyright 2014 the V8 project authors. All rights reserved. 1 // Copyright 2014 the V8 project authors. All rights reserved.
2 // Use of this source code is governed by a BSD-style license that can be 2 // Use of this source code is governed by a BSD-style license that can be
3 // found in the LICENSE file. 3 // found in the LICENSE file.
4 4
5 #include "src/base/adapters.h" 5 #include "src/base/adapters.h"
6 #include "src/base/bits.h" 6 #include "src/base/bits.h"
7 #include "src/compiler/instruction-selector-impl.h" 7 #include "src/compiler/instruction-selector-impl.h"
8 #include "src/compiler/node-matchers.h" 8 #include "src/compiler/node-matchers.h"
9 #include "src/compiler/node-properties.h" 9 #include "src/compiler/node-properties.h"
10 10
(...skipping 1869 matching lines...) Expand 10 before | Expand all | Expand 10 after
1880 Emit(kMipsAdd | AddressingModeField::encode(kMode_None), addr_reg, 1880 Emit(kMipsAdd | AddressingModeField::encode(kMode_None), addr_reg,
1881 g.UseRegister(index), g.UseRegister(base)); 1881 g.UseRegister(index), g.UseRegister(base));
1882 // Emit desired store opcode, using temp addr_reg. 1882 // Emit desired store opcode, using temp addr_reg.
1883 Emit(opcode | AddressingModeField::encode(kMode_MRI), g.NoOutput(), 1883 Emit(opcode | AddressingModeField::encode(kMode_MRI), g.NoOutput(),
1884 addr_reg, g.TempImmediate(0), g.UseRegisterOrImmediateZero(value)); 1884 addr_reg, g.TempImmediate(0), g.UseRegisterOrImmediateZero(value));
1885 } 1885 }
1886 } 1886 }
1887 1887
1888 void InstructionSelector::VisitAtomicExchange(Node* node) { UNIMPLEMENTED(); } 1888 void InstructionSelector::VisitAtomicExchange(Node* node) { UNIMPLEMENTED(); }
1889 1889
1890 void InstructionSelector::VisitAtomicCompareExchange(Node* node) {
1891 UNIMPLEMENTED();
1892 }
1893
1890 // static 1894 // static
1891 MachineOperatorBuilder::Flags 1895 MachineOperatorBuilder::Flags
1892 InstructionSelector::SupportedMachineOperatorFlags() { 1896 InstructionSelector::SupportedMachineOperatorFlags() {
1893 MachineOperatorBuilder::Flags flags = MachineOperatorBuilder::kNoFlags; 1897 MachineOperatorBuilder::Flags flags = MachineOperatorBuilder::kNoFlags;
1894 if ((IsMipsArchVariant(kMips32r2) || IsMipsArchVariant(kMips32r6)) && 1898 if ((IsMipsArchVariant(kMips32r2) || IsMipsArchVariant(kMips32r6)) &&
1895 IsFp64Mode()) { 1899 IsFp64Mode()) {
1896 flags |= MachineOperatorBuilder::kFloat64RoundDown | 1900 flags |= MachineOperatorBuilder::kFloat64RoundDown |
1897 MachineOperatorBuilder::kFloat64RoundUp | 1901 MachineOperatorBuilder::kFloat64RoundUp |
1898 MachineOperatorBuilder::kFloat64RoundTruncate | 1902 MachineOperatorBuilder::kFloat64RoundTruncate |
1899 MachineOperatorBuilder::kFloat64RoundTiesEven; 1903 MachineOperatorBuilder::kFloat64RoundTiesEven;
(...skipping 22 matching lines...) Expand all
1922 DCHECK(IsMipsArchVariant(kLoongson) || IsMipsArchVariant(kMips32r1) || 1926 DCHECK(IsMipsArchVariant(kLoongson) || IsMipsArchVariant(kMips32r1) ||
1923 IsMipsArchVariant(kMips32r2)); 1927 IsMipsArchVariant(kMips32r2));
1924 return MachineOperatorBuilder::AlignmentRequirements:: 1928 return MachineOperatorBuilder::AlignmentRequirements::
1925 NoUnalignedAccessSupport(); 1929 NoUnalignedAccessSupport();
1926 } 1930 }
1927 } 1931 }
1928 1932
1929 } // namespace compiler 1933 } // namespace compiler
1930 } // namespace internal 1934 } // namespace internal
1931 } // namespace v8 1935 } // namespace v8
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