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Side by Side Diff: src/compiler/ia32/instruction-selector-ia32.cc

Issue 2649703002: [Atomics] Make Atomics.compareExchange a builtin using TF (Closed)
Patch Set: rebase and move cmpxchg to builtins-sharedarraybuffer-gen.cc Created 3 years, 9 months ago
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1 // Copyright 2014 the V8 project authors. All rights reserved. 1 // Copyright 2014 the V8 project authors. All rights reserved.
2 // Use of this source code is governed by a BSD-style license that can be 2 // Use of this source code is governed by a BSD-style license that can be
3 // found in the LICENSE file. 3 // found in the LICENSE file.
4 4
5 #include "src/base/adapters.h" 5 #include "src/base/adapters.h"
6 #include "src/compiler/instruction-selector-impl.h" 6 #include "src/compiler/instruction-selector-impl.h"
7 #include "src/compiler/node-matchers.h" 7 #include "src/compiler/node-matchers.h"
8 #include "src/compiler/node-properties.h" 8 #include "src/compiler/node-properties.h"
9 9
10 namespace v8 { 10 namespace v8 {
(...skipping 1759 matching lines...) Expand 10 before | Expand all | Expand 10 after
1770 addressing_mode = kMode_MRI; 1770 addressing_mode = kMode_MRI;
1771 } else { 1771 } else {
1772 inputs[input_count++] = g.UseUniqueRegister(index); 1772 inputs[input_count++] = g.UseUniqueRegister(index);
1773 addressing_mode = kMode_MR1; 1773 addressing_mode = kMode_MR1;
1774 } 1774 }
1775 outputs[0] = g.DefineSameAsFirst(node); 1775 outputs[0] = g.DefineSameAsFirst(node);
1776 InstructionCode code = opcode | AddressingModeField::encode(addressing_mode); 1776 InstructionCode code = opcode | AddressingModeField::encode(addressing_mode);
1777 Emit(code, 1, outputs, input_count, inputs); 1777 Emit(code, 1, outputs, input_count, inputs);
1778 } 1778 }
1779 1779
1780 void InstructionSelector::VisitAtomicCompareExchange(Node* node) {
1781 IA32OperandGenerator g(this);
1782 Node* base = node->InputAt(0);
1783 Node* index = node->InputAt(1);
1784 Node* old_value = node->InputAt(2);
1785 Node* new_value = node->InputAt(3);
1786
1787 MachineType type = AtomicCompareExchangeRepresentationOf(node->op());
1788 ArchOpcode opcode = kArchNop;
1789 if (type == MachineType::Int8()) {
1790 opcode = kAtomicCompareExchangeInt8;
1791 } else if (type == MachineType::Uint8()) {
1792 opcode = kAtomicCompareExchangeUint8;
1793 } else if (type == MachineType::Int16()) {
1794 opcode = kAtomicCompareExchangeInt16;
1795 } else if (type == MachineType::Uint16()) {
1796 opcode = kAtomicCompareExchangeUint16;
1797 } else if (type == MachineType::Int32() || type == MachineType::Uint32()) {
1798 opcode = kAtomicCompareExchangeWord32;
1799 } else {
1800 UNREACHABLE();
1801 return;
1802 }
1803 InstructionOperand outputs[1];
1804 AddressingMode addressing_mode;
1805 InstructionOperand inputs[4];
1806 size_t input_count = 0;
1807 inputs[input_count++] = g.UseFixed(old_value, eax);
1808 inputs[input_count++] = g.UseUniqueRegister(new_value);
1809 inputs[input_count++] = g.UseUniqueRegister(base);
1810 if (g.CanBeImmediate(index)) {
1811 inputs[input_count++] = g.UseImmediate(index);
1812 addressing_mode = kMode_MRI;
1813 } else {
1814 inputs[input_count++] = g.UseUniqueRegister(index);
1815 addressing_mode = kMode_MR1;
1816 }
1817 outputs[0] = g.DefineAsFixed(node, eax);
1818 InstructionCode code = opcode | AddressingModeField::encode(addressing_mode);
1819 Emit(code, 1, outputs, input_count, inputs);
1820 }
1821
1780 void InstructionSelector::VisitInt32x4Splat(Node* node) { 1822 void InstructionSelector::VisitInt32x4Splat(Node* node) {
1781 VisitRO(this, node, kIA32Int32x4Splat); 1823 VisitRO(this, node, kIA32Int32x4Splat);
1782 } 1824 }
1783 1825
1784 void InstructionSelector::VisitInt32x4ExtractLane(Node* node) { 1826 void InstructionSelector::VisitInt32x4ExtractLane(Node* node) {
1785 IA32OperandGenerator g(this); 1827 IA32OperandGenerator g(this);
1786 int32_t lane = OpParameter<int32_t>(node); 1828 int32_t lane = OpParameter<int32_t>(node);
1787 Emit(kIA32Int32x4ExtractLane, g.DefineAsRegister(node), 1829 Emit(kIA32Int32x4ExtractLane, g.DefineAsRegister(node),
1788 g.UseRegister(node->InputAt(0)), g.UseImmediate(lane)); 1830 g.UseRegister(node->InputAt(0)), g.UseImmediate(lane));
1789 } 1831 }
(...skipping 31 matching lines...) Expand 10 before | Expand all | Expand 10 after
1821 // static 1863 // static
1822 MachineOperatorBuilder::AlignmentRequirements 1864 MachineOperatorBuilder::AlignmentRequirements
1823 InstructionSelector::AlignmentRequirements() { 1865 InstructionSelector::AlignmentRequirements() {
1824 return MachineOperatorBuilder::AlignmentRequirements:: 1866 return MachineOperatorBuilder::AlignmentRequirements::
1825 FullUnalignedAccessSupport(); 1867 FullUnalignedAccessSupport();
1826 } 1868 }
1827 1869
1828 } // namespace compiler 1870 } // namespace compiler
1829 } // namespace internal 1871 } // namespace internal
1830 } // namespace v8 1872 } // namespace v8
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