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Side by Side Diff: src/compiler/arm64/instruction-selector-arm64.cc

Issue 2649703002: [Atomics] Make Atomics.compareExchange a builtin using TF (Closed)
Patch Set: rebase and move cmpxchg to builtins-sharedarraybuffer-gen.cc Created 3 years, 9 months ago
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1 // Copyright 2014 the V8 project authors. All rights reserved. 1 // Copyright 2014 the V8 project authors. All rights reserved.
2 // Use of this source code is governed by a BSD-style license that can be 2 // Use of this source code is governed by a BSD-style license that can be
3 // found in the LICENSE file. 3 // found in the LICENSE file.
4 4
5 #include "src/assembler-inl.h" 5 #include "src/assembler-inl.h"
6 #include "src/compiler/instruction-selector-impl.h" 6 #include "src/compiler/instruction-selector-impl.h"
7 #include "src/compiler/node-matchers.h" 7 #include "src/compiler/node-matchers.h"
8 #include "src/compiler/node-properties.h" 8 #include "src/compiler/node-properties.h"
9 9
10 namespace v8 { 10 namespace v8 {
(...skipping 2721 matching lines...) Expand 10 before | Expand all | Expand 10 after
2732 inputs[input_count++] = g.UseUniqueRegister(index); 2732 inputs[input_count++] = g.UseUniqueRegister(index);
2733 inputs[input_count++] = g.UseUniqueRegister(value); 2733 inputs[input_count++] = g.UseUniqueRegister(value);
2734 InstructionOperand outputs[1]; 2734 InstructionOperand outputs[1];
2735 outputs[0] = g.UseUniqueRegister(node); 2735 outputs[0] = g.UseUniqueRegister(node);
2736 InstructionOperand temp[2]; 2736 InstructionOperand temp[2];
2737 temp[0] = g.TempRegister(); 2737 temp[0] = g.TempRegister();
2738 InstructionCode code = opcode | AddressingModeField::encode(addressing_mode); 2738 InstructionCode code = opcode | AddressingModeField::encode(addressing_mode);
2739 Emit(code, 1, outputs, input_count, inputs, 1, temp); 2739 Emit(code, 1, outputs, input_count, inputs, 1, temp);
2740 } 2740 }
2741 2741
2742 void InstructionSelector::VisitAtomicCompareExchange(Node* node) {
2743 Arm64OperandGenerator g(this);
2744 Node* base = node->InputAt(0);
2745 Node* index = node->InputAt(1);
2746 Node* old_value = node->InputAt(2);
2747 Node* new_value = node->InputAt(3);
2748 ArchOpcode opcode = kArchNop;
2749 MachineType type = AtomicCompareExchangeRepresentationOf(node->op());
2750 if (type == MachineType::Int8()) {
2751 opcode = kAtomicCompareExchangeInt8;
2752 } else if (type == MachineType::Uint8()) {
2753 opcode = kAtomicCompareExchangeUint8;
2754 } else if (type == MachineType::Int16()) {
2755 opcode = kAtomicCompareExchangeInt16;
2756 } else if (type == MachineType::Uint16()) {
2757 opcode = kAtomicCompareExchangeUint16;
2758 } else if (type == MachineType::Int32() || type == MachineType::Uint32()) {
2759 opcode = kAtomicCompareExchangeWord32;
2760 } else {
2761 UNREACHABLE();
2762 return;
2763 }
2764
2765 AddressingMode addressing_mode = kMode_MRR;
2766 InstructionOperand inputs[4];
2767 size_t input_count = 0;
2768 inputs[input_count++] = g.UseUniqueRegister(base);
2769 inputs[input_count++] = g.UseUniqueRegister(index);
2770 inputs[input_count++] = g.UseUniqueRegister(old_value);
2771 inputs[input_count++] = g.UseUniqueRegister(new_value);
2772 InstructionOperand outputs[1];
2773 outputs[0] = g.UseUniqueRegister(node);
2774 InstructionOperand temp[2];
2775 temp[0] = g.TempRegister();
2776 temp[1] = g.TempRegister();
2777 InstructionCode code = opcode | AddressingModeField::encode(addressing_mode);
2778 Emit(code, 1, outputs, input_count, inputs, 2, temp);
2779 }
2780
2742 // static 2781 // static
2743 MachineOperatorBuilder::Flags 2782 MachineOperatorBuilder::Flags
2744 InstructionSelector::SupportedMachineOperatorFlags() { 2783 InstructionSelector::SupportedMachineOperatorFlags() {
2745 return MachineOperatorBuilder::kFloat32RoundDown | 2784 return MachineOperatorBuilder::kFloat32RoundDown |
2746 MachineOperatorBuilder::kFloat64RoundDown | 2785 MachineOperatorBuilder::kFloat64RoundDown |
2747 MachineOperatorBuilder::kFloat32RoundUp | 2786 MachineOperatorBuilder::kFloat32RoundUp |
2748 MachineOperatorBuilder::kFloat64RoundUp | 2787 MachineOperatorBuilder::kFloat64RoundUp |
2749 MachineOperatorBuilder::kFloat32RoundTruncate | 2788 MachineOperatorBuilder::kFloat32RoundTruncate |
2750 MachineOperatorBuilder::kFloat64RoundTruncate | 2789 MachineOperatorBuilder::kFloat64RoundTruncate |
2751 MachineOperatorBuilder::kFloat64RoundTiesAway | 2790 MachineOperatorBuilder::kFloat64RoundTiesAway |
2752 MachineOperatorBuilder::kFloat32RoundTiesEven | 2791 MachineOperatorBuilder::kFloat32RoundTiesEven |
2753 MachineOperatorBuilder::kFloat64RoundTiesEven | 2792 MachineOperatorBuilder::kFloat64RoundTiesEven |
2754 MachineOperatorBuilder::kWord32ShiftIsSafe | 2793 MachineOperatorBuilder::kWord32ShiftIsSafe |
2755 MachineOperatorBuilder::kInt32DivIsSafe | 2794 MachineOperatorBuilder::kInt32DivIsSafe |
2756 MachineOperatorBuilder::kUint32DivIsSafe | 2795 MachineOperatorBuilder::kUint32DivIsSafe |
2757 MachineOperatorBuilder::kWord32ReverseBits | 2796 MachineOperatorBuilder::kWord32ReverseBits |
2758 MachineOperatorBuilder::kWord64ReverseBits; 2797 MachineOperatorBuilder::kWord64ReverseBits;
2759 } 2798 }
2760 2799
2761 // static 2800 // static
2762 MachineOperatorBuilder::AlignmentRequirements 2801 MachineOperatorBuilder::AlignmentRequirements
2763 InstructionSelector::AlignmentRequirements() { 2802 InstructionSelector::AlignmentRequirements() {
2764 return MachineOperatorBuilder::AlignmentRequirements:: 2803 return MachineOperatorBuilder::AlignmentRequirements::
2765 FullUnalignedAccessSupport(); 2804 FullUnalignedAccessSupport();
2766 } 2805 }
2767 2806
2768 } // namespace compiler 2807 } // namespace compiler
2769 } // namespace internal 2808 } // namespace internal
2770 } // namespace v8 2809 } // namespace v8
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