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Side by Side Diff: src/compiler/ppc/instruction-selector-ppc.cc

Issue 2649703002: [Atomics] Make Atomics.compareExchange a builtin using TF (Closed)
Patch Set: PPC and S390 Created 3 years, 9 months ago
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1 // Copyright 2014 the V8 project authors. All rights reserved. 1 // Copyright 2014 the V8 project authors. All rights reserved.
2 // Use of this source code is governed by a BSD-style license that can be 2 // Use of this source code is governed by a BSD-style license that can be
3 // found in the LICENSE file. 3 // found in the LICENSE file.
4 4
5 #include "src/base/adapters.h" 5 #include "src/base/adapters.h"
6 #include "src/compiler/instruction-selector-impl.h" 6 #include "src/compiler/instruction-selector-impl.h"
7 #include "src/compiler/node-matchers.h" 7 #include "src/compiler/node-matchers.h"
8 #include "src/compiler/node-properties.h" 8 #include "src/compiler/node-properties.h"
9 #include "src/ppc/frames-ppc.h" 9 #include "src/ppc/frames-ppc.h"
10 10
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2108 size_t input_count = 0; 2108 size_t input_count = 0;
2109 inputs[input_count++] = g.UseUniqueRegister(base); 2109 inputs[input_count++] = g.UseUniqueRegister(base);
2110 inputs[input_count++] = g.UseUniqueRegister(index); 2110 inputs[input_count++] = g.UseUniqueRegister(index);
2111 inputs[input_count++] = g.UseUniqueRegister(value); 2111 inputs[input_count++] = g.UseUniqueRegister(value);
2112 Emit(opcode | AddressingModeField::encode(kMode_MRR), 2112 Emit(opcode | AddressingModeField::encode(kMode_MRR),
2113 0, nullptr, input_count, inputs); 2113 0, nullptr, input_count, inputs);
2114 } 2114 }
2115 2115
2116 void InstructionSelector::VisitAtomicExchange(Node* node) { UNIMPLEMENTED(); } 2116 void InstructionSelector::VisitAtomicExchange(Node* node) { UNIMPLEMENTED(); }
2117 2117
2118 void InstructionSelector::VisitAtomicCompareExchange(Node* node) {
2119 UNIMPLEMENTED();
2120 }
2121
2118 // static 2122 // static
2119 MachineOperatorBuilder::Flags 2123 MachineOperatorBuilder::Flags
2120 InstructionSelector::SupportedMachineOperatorFlags() { 2124 InstructionSelector::SupportedMachineOperatorFlags() {
2121 return MachineOperatorBuilder::kFloat32RoundDown | 2125 return MachineOperatorBuilder::kFloat32RoundDown |
2122 MachineOperatorBuilder::kFloat64RoundDown | 2126 MachineOperatorBuilder::kFloat64RoundDown |
2123 MachineOperatorBuilder::kFloat32RoundUp | 2127 MachineOperatorBuilder::kFloat32RoundUp |
2124 MachineOperatorBuilder::kFloat64RoundUp | 2128 MachineOperatorBuilder::kFloat64RoundUp |
2125 MachineOperatorBuilder::kFloat32RoundTruncate | 2129 MachineOperatorBuilder::kFloat32RoundTruncate |
2126 MachineOperatorBuilder::kFloat64RoundTruncate | 2130 MachineOperatorBuilder::kFloat64RoundTruncate |
2127 MachineOperatorBuilder::kFloat64RoundTiesAway | 2131 MachineOperatorBuilder::kFloat64RoundTiesAway |
2128 MachineOperatorBuilder::kWord32Popcnt | 2132 MachineOperatorBuilder::kWord32Popcnt |
2129 MachineOperatorBuilder::kWord64Popcnt; 2133 MachineOperatorBuilder::kWord64Popcnt;
2130 // We omit kWord32ShiftIsSafe as s[rl]w use 0x3f as a mask rather than 0x1f. 2134 // We omit kWord32ShiftIsSafe as s[rl]w use 0x3f as a mask rather than 0x1f.
2131 } 2135 }
2132 2136
2133 // static 2137 // static
2134 MachineOperatorBuilder::AlignmentRequirements 2138 MachineOperatorBuilder::AlignmentRequirements
2135 InstructionSelector::AlignmentRequirements() { 2139 InstructionSelector::AlignmentRequirements() {
2136 return MachineOperatorBuilder::AlignmentRequirements:: 2140 return MachineOperatorBuilder::AlignmentRequirements::
2137 FullUnalignedAccessSupport(); 2141 FullUnalignedAccessSupport();
2138 } 2142 }
2139 2143
2140 } // namespace compiler 2144 } // namespace compiler
2141 } // namespace internal 2145 } // namespace internal
2142 } // namespace v8 2146 } // namespace v8
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