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Side by Side Diff: runtime/vm/assembler_arm64_test.cc

Issue 264943007: Adds double load and store to arm64. (Closed) Base URL: http://dart.googlecode.com/svn/branches/bleeding_edge/dart/
Patch Set: Created 6 years, 7 months ago
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1 // Copyright (c) 2013, the Dart project authors. Please see the AUTHORS file 1 // Copyright (c) 2013, the Dart project authors. Please see the AUTHORS file
2 // for details. All rights reserved. Use of this source code is governed by a 2 // for details. All rights reserved. Use of this source code is governed by a
3 // BSD-style license that can be found in the LICENSE file. 3 // BSD-style license that can be found in the LICENSE file.
4 4
5 #include "vm/globals.h" 5 #include "vm/globals.h"
6 #if defined(TARGET_ARCH_ARM64) 6 #if defined(TARGET_ARCH_ARM64)
7 7
8 #include "vm/assembler.h" 8 #include "vm/assembler.h"
9 #include "vm/cpu.h" 9 #include "vm/cpu.h"
10 #include "vm/os.h" 10 #include "vm/os.h"
(...skipping 1352 matching lines...) Expand 10 before | Expand all | Expand 10 after
1363 __ ret(); 1363 __ ret();
1364 } 1364 }
1365 1365
1366 1366
1367 ASSEMBLER_TEST_RUN(Fmovdr, test) { 1367 ASSEMBLER_TEST_RUN(Fmovdr, test) {
1368 typedef int (*SimpleCode)(); 1368 typedef int (*SimpleCode)();
1369 EXPECT_EQ(1.0, EXECUTE_TEST_CODE_DOUBLE(SimpleCode, test->entry())); 1369 EXPECT_EQ(1.0, EXECUTE_TEST_CODE_DOUBLE(SimpleCode, test->entry()));
1370 } 1370 }
1371 1371
1372 1372
1373 ASSEMBLER_TEST_GENERATE(FldrdFstrdPrePostIndex, assembler) {
1374 __ LoadDImmediate(V1, 42.0, kNoPP);
1375 __ fstrd(V1, Address(SP, -1*kWordSize, Address::PreIndex));
1376 __ fldrd(V0, Address(SP, 1*kWordSize, Address::PostIndex));
1377 __ ret();
1378 }
1379
1380
1381 ASSEMBLER_TEST_RUN(FldrdFstrdPrePostIndex, test) {
1382 typedef int (*SimpleCode)();
1383 EXPECT_EQ(42.0, EXECUTE_TEST_CODE_DOUBLE(SimpleCode, test->entry()));
1384 }
1385
1386
1387 ASSEMBLER_TEST_GENERATE(FldrdFstrdHeapTag, assembler) {
1388 __ LoadDImmediate(V0, 43.0, kNoPP);
1389 __ LoadDImmediate(V1, 42.0, kNoPP);
1390 __ AddImmediate(SP, SP, -1 * kWordSize, kNoPP);
1391 __ add(R2, SP, Operand(1));
1392 __ fstrd(V1, Address(R2, -1));
1393 __ fldrd(V0, Address(R2, -1));
1394 __ AddImmediate(SP, SP, 1 * kWordSize, kNoPP);
1395 __ ret();
1396 }
1397
1398
1399 ASSEMBLER_TEST_RUN(FldrdFstrdHeapTag, test) {
1400 typedef int (*SimpleCode)();
1401 EXPECT_EQ(42.0, EXECUTE_TEST_CODE_DOUBLE(SimpleCode, test->entry()));
1402 }
1403
1404
1405 ASSEMBLER_TEST_GENERATE(FldrdFstrdLargeIndex, assembler) {
1406 __ LoadDImmediate(V0, 43.0, kNoPP);
1407 __ LoadDImmediate(V1, 42.0, kNoPP);
1408 // Largest negative offset that can fit in the signed 9-bit immediate field.
1409 __ fstrd(V1, Address(SP, -32*kWordSize, Address::PreIndex));
1410 // Largest positive kWordSize aligned offset that we can fit.
1411 __ fldrd(V0, Address(SP, 31*kWordSize, Address::PostIndex));
1412 // Correction.
1413 __ add(SP, SP, Operand(kWordSize)); // Restore SP.
1414 __ ret();
1415 }
1416
1417
1418 ASSEMBLER_TEST_RUN(FldrdFstrdLargeIndex, test) {
1419 typedef int (*SimpleCode)();
1420 EXPECT_EQ(42.0, EXECUTE_TEST_CODE_DOUBLE(SimpleCode, test->entry()));
1421 }
1422
1423
1424 ASSEMBLER_TEST_GENERATE(FldrdFstrdLargeOffset, assembler) {
1425 __ LoadDImmediate(V0, 43.0, kNoPP);
1426 __ LoadDImmediate(V1, 42.0, kNoPP);
1427 __ sub(SP, SP, Operand(512*kWordSize));
1428 __ fstrd(V1, Address(SP, 512*kWordSize, Address::Offset));
1429 __ add(SP, SP, Operand(512*kWordSize));
1430 __ fldrd(V0, Address(SP));
1431 __ ret();
1432 }
1433
1434
1435 ASSEMBLER_TEST_RUN(FldrdFstrdLargeOffset, test) {
1436 typedef int (*SimpleCode)();
1437 EXPECT_EQ(42.0, EXECUTE_TEST_CODE_DOUBLE(SimpleCode, test->entry()));
1438 }
1439
1440
1441 ASSEMBLER_TEST_GENERATE(FldrdFstrdExtReg, assembler) {
1442 __ LoadDImmediate(V0, 43.0, kNoPP);
1443 __ LoadDImmediate(V1, 42.0, kNoPP);
1444 __ movz(R2, 0xfff8, 0);
1445 __ movk(R2, 0xffff, 1); // R2 <- -8 (int32_t).
1446 // This should sign extend R2, and add to SP to get address,
1447 // i.e. SP - kWordSize.
1448 __ fstrd(V1, Address(SP, R2, SXTW));
1449 __ sub(SP, SP, Operand(kWordSize));
1450 __ fldrd(V0, Address(SP));
1451 __ add(SP, SP, Operand(kWordSize));
1452 __ ret();
1453 }
1454
1455
1456 ASSEMBLER_TEST_RUN(FldrdFstrdExtReg, test) {
1457 typedef int (*SimpleCode)();
1458 EXPECT_EQ(42.0, EXECUTE_TEST_CODE_DOUBLE(SimpleCode, test->entry()));
1459 }
1460
1461
1462 ASSEMBLER_TEST_GENERATE(FldrdFstrdScaledReg, assembler) {
1463 __ LoadDImmediate(V0, 43.0, kNoPP);
1464 __ LoadDImmediate(V1, 42.0, kNoPP);
1465 __ movz(R2, 10, 0);
1466 __ sub(SP, SP, Operand(10*kWordSize));
1467 // Store V1 into SP + R2 * kWordSize.
1468 __ fstrd(V1, Address(SP, R2, UXTX, Address::Scaled));
1469 __ fldrd(V0, Address(SP, R2, UXTX, Address::Scaled));
1470 __ add(SP, SP, Operand(10*kWordSize));
1471 __ ret();
1472 }
1473
1474
1475 ASSEMBLER_TEST_RUN(FldrdFstrdScaledReg, test) {
1476 typedef int (*SimpleCode)();
1477 EXPECT_EQ(42.0, EXECUTE_TEST_CODE_DOUBLE(SimpleCode, test->entry()));
1478 }
1479
1480
1373 // Called from assembler_test.cc. 1481 // Called from assembler_test.cc.
1374 // LR: return address. 1482 // LR: return address.
1375 // R0: context. 1483 // R0: context.
1376 // R1: value. 1484 // R1: value.
1377 // R2: growable array. 1485 // R2: growable array.
1378 ASSEMBLER_TEST_GENERATE(StoreIntoObject, assembler) { 1486 ASSEMBLER_TEST_GENERATE(StoreIntoObject, assembler) {
1379 __ TagAndPushPP(); 1487 __ TagAndPushPP();
1380 __ LoadPoolPointer(PP); 1488 __ LoadPoolPointer(PP);
1381 __ Push(CTX); 1489 __ Push(CTX);
1382 __ Push(LR); 1490 __ Push(LR);
1383 __ mov(CTX, R0); 1491 __ mov(CTX, R0);
1384 __ StoreIntoObject(R2, 1492 __ StoreIntoObject(R2,
1385 FieldAddress(R2, GrowableObjectArray::data_offset()), 1493 FieldAddress(R2, GrowableObjectArray::data_offset()),
1386 R1); 1494 R1);
1387 __ Pop(LR); 1495 __ Pop(LR);
1388 __ Pop(CTX); 1496 __ Pop(CTX);
1389 __ PopAndUntagPP(); 1497 __ PopAndUntagPP();
1390 __ ret(); 1498 __ ret();
1391 } 1499 }
1392 1500
1393 } // namespace dart 1501 } // namespace dart
1394 1502
1395 #endif // defined(TARGET_ARCH_ARM64) 1503 #endif // defined(TARGET_ARCH_ARM64)
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