| Index: src/arm/assembler-arm.cc
|
| diff --git a/src/arm/assembler-arm.cc b/src/arm/assembler-arm.cc
|
| index 52213b06ccebc89d64b34939a0ebb730571f6828..ec75b7d07e62b2cb103761ede5e4253d3090b7d7 100644
|
| --- a/src/arm/assembler-arm.cc
|
| +++ b/src/arm/assembler-arm.cc
|
| @@ -4272,7 +4272,19 @@ static Instr EncodeNeonBinOp(FPBinOp op, QwNeonRegister dst,
|
| vm | op_encoding;
|
| }
|
|
|
| -enum IntegerBinOp { VADD, VSUB, VMUL, VMIN, VMAX, VTST, VCEQ, VCGE, VCGT };
|
| +enum IntegerBinOp {
|
| + VADD,
|
| + VQADD,
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| + VSUB,
|
| + VQSUB,
|
| + VMUL,
|
| + VMIN,
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| + VMAX,
|
| + VTST,
|
| + VCEQ,
|
| + VCGE,
|
| + VCGT
|
| +};
|
|
|
| static Instr EncodeNeonBinOp(IntegerBinOp op, NeonDataType dt,
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| const QwNeonRegister dst,
|
| @@ -4283,9 +4295,15 @@ static Instr EncodeNeonBinOp(IntegerBinOp op, NeonDataType dt,
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| case VADD:
|
| op_encoding = 0x8 * B8;
|
| break;
|
| + case VQADD:
|
| + op_encoding = B4;
|
| + break;
|
| case VSUB:
|
| op_encoding = B24 | 0x8 * B8;
|
| break;
|
| + case VQSUB:
|
| + op_encoding = 0x2 * B8 | B4;
|
| + break;
|
| case VMUL:
|
| op_encoding = 0x9 * B8 | B4;
|
| break;
|
| @@ -4348,6 +4366,14 @@ void Assembler::vadd(NeonSize size, QwNeonRegister dst, QwNeonRegister src1,
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| emit(EncodeNeonBinOp(VADD, size, dst, src1, src2));
|
| }
|
|
|
| +void Assembler::vqadd(NeonDataType dt, QwNeonRegister dst, QwNeonRegister src1,
|
| + QwNeonRegister src2) {
|
| + DCHECK(IsEnabled(NEON));
|
| + // Qd = vqadd(Qn, Qm) SIMD integer saturating addition.
|
| + // Instruction details available in ARM DDI 0406C.b, A8-996.
|
| + emit(EncodeNeonBinOp(VQADD, dt, dst, src1, src2));
|
| +}
|
| +
|
| void Assembler::vsub(QwNeonRegister dst, QwNeonRegister src1,
|
| QwNeonRegister src2) {
|
| DCHECK(IsEnabled(NEON));
|
| @@ -4364,6 +4390,14 @@ void Assembler::vsub(NeonSize size, QwNeonRegister dst, QwNeonRegister src1,
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| emit(EncodeNeonBinOp(VSUB, size, dst, src1, src2));
|
| }
|
|
|
| +void Assembler::vqsub(NeonDataType dt, QwNeonRegister dst, QwNeonRegister src1,
|
| + QwNeonRegister src2) {
|
| + DCHECK(IsEnabled(NEON));
|
| + // Qd = vqsub(Qn, Qm) SIMD integer saturating subtraction.
|
| + // Instruction details available in ARM DDI 0406C.b, A8-1020.
|
| + emit(EncodeNeonBinOp(VQSUB, dt, dst, src1, src2));
|
| +}
|
| +
|
| void Assembler::vmul(QwNeonRegister dst, QwNeonRegister src1,
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| QwNeonRegister src2) {
|
| DCHECK(IsEnabled(NEON));
|
|
|