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1 // Copyright 2014 the V8 project authors. All rights reserved. | 1 // Copyright 2014 the V8 project authors. All rights reserved. |
2 // Use of this source code is governed by a BSD-style license that can be | 2 // Use of this source code is governed by a BSD-style license that can be |
3 // found in the LICENSE file. | 3 // found in the LICENSE file. |
4 | 4 |
5 // A Disassembler object is used to disassemble a block of code instruction by | 5 // A Disassembler object is used to disassemble a block of code instruction by |
6 // instruction. The default implementation of the NameConverter object can be | 6 // instruction. The default implementation of the NameConverter object can be |
7 // overriden to modify register names or to do symbol lookup on addresses. | 7 // overriden to modify register names or to do symbol lookup on addresses. |
8 // | 8 // |
9 // The example below will disassemble a block of code and print it to stdout. | 9 // The example below will disassemble a block of code and print it to stdout. |
10 // | 10 // |
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705 break; | 705 break; |
706 case XGR: | 706 case XGR: |
707 Format(instr, "xgr\t'r5,'r6"); | 707 Format(instr, "xgr\t'r5,'r6"); |
708 break; | 708 break; |
709 case XRK: | 709 case XRK: |
710 Format(instr, "xrk\t'r5,'r6,'r3"); | 710 Format(instr, "xrk\t'r5,'r6,'r3"); |
711 break; | 711 break; |
712 case XGRK: | 712 case XGRK: |
713 Format(instr, "xgrk\t'r5,'r6,'r3"); | 713 Format(instr, "xgrk\t'r5,'r6,'r3"); |
714 break; | 714 break; |
| 715 case CGFR: |
| 716 Format(instr, "cgfr\t'r5,'r6"); |
| 717 break; |
715 case CGR: | 718 case CGR: |
716 Format(instr, "cgr\t'r5,'r6"); | 719 Format(instr, "cgr\t'r5,'r6"); |
717 break; | 720 break; |
718 case CLGR: | 721 case CLGR: |
719 Format(instr, "clgr\t'r5,'r6"); | 722 Format(instr, "clgr\t'r5,'r6"); |
720 break; | 723 break; |
721 case LLGFR: | 724 case LLGFR: |
722 Format(instr, "llgfr\t'r5,'r6"); | 725 Format(instr, "llgfr\t'r5,'r6"); |
723 break; | 726 break; |
724 case LBR: | 727 case LBR: |
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768 break; | 771 break; |
769 case LGHR: | 772 case LGHR: |
770 Format(instr, "lghr\t'r5,'r6"); | 773 Format(instr, "lghr\t'r5,'r6"); |
771 break; | 774 break; |
772 case MSGR: | 775 case MSGR: |
773 Format(instr, "msgr\t'r5,'r6"); | 776 Format(instr, "msgr\t'r5,'r6"); |
774 break; | 777 break; |
775 case DSGR: | 778 case DSGR: |
776 Format(instr, "dsgr\t'r5,'r6"); | 779 Format(instr, "dsgr\t'r5,'r6"); |
777 break; | 780 break; |
| 781 case DSGFR: |
| 782 Format(instr, "dsgfr\t'r5,'r6"); |
| 783 break; |
| 784 case MSGFR: |
| 785 Format(instr, "msgfr\t'r5,'r6"); |
| 786 break; |
778 case LZDR: | 787 case LZDR: |
779 Format(instr, "lzdr\t'f5"); | 788 Format(instr, "lzdr\t'f5"); |
780 break; | 789 break; |
781 case MLR: | 790 case MLR: |
782 Format(instr, "mlr\t'r5,'r6"); | 791 Format(instr, "mlr\t'r5,'r6"); |
783 break; | 792 break; |
784 case MLGR: | 793 case MLGR: |
785 Format(instr, "mlgr\t'r5,'r6"); | 794 Format(instr, "mlgr\t'r5,'r6"); |
786 break; | 795 break; |
787 case ALCR: | 796 case ALCR: |
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1384 break; | 1393 break; |
1385 case LDY: | 1394 case LDY: |
1386 Format(instr, "ldy\t'f1,'d2('r2d,'r3)"); | 1395 Format(instr, "ldy\t'f1,'d2('r2d,'r3)"); |
1387 break; | 1396 break; |
1388 case LEY: | 1397 case LEY: |
1389 Format(instr, "ley\t'f1,'d2('r2d,'r3)"); | 1398 Format(instr, "ley\t'f1,'d2('r2d,'r3)"); |
1390 break; | 1399 break; |
1391 case MSG: | 1400 case MSG: |
1392 Format(instr, "msg\t'r1,'d2('r2d,'r3)"); | 1401 Format(instr, "msg\t'r1,'d2('r2d,'r3)"); |
1393 break; | 1402 break; |
| 1403 case DSG: |
| 1404 Format(instr, "dsg\t'r1,'d2('r2d,'r3)"); |
| 1405 break; |
| 1406 case DSGF: |
| 1407 Format(instr, "dsgf\t'r1,'d2('r2d,'r3)"); |
| 1408 break; |
| 1409 case MSGF: |
| 1410 Format(instr, "msgf\t'r1,'d2('r2d,'r3)"); |
| 1411 break; |
1394 case MSY: | 1412 case MSY: |
1395 Format(instr, "msy\t'r1,'d2('r2d,'r3)"); | 1413 Format(instr, "msy\t'r1,'d2('r2d,'r3)"); |
1396 break; | 1414 break; |
1397 case STEY: | 1415 case STEY: |
1398 Format(instr, "stey\t'f1,'d2('r2d,'r3)"); | 1416 Format(instr, "stey\t'f1,'d2('r2d,'r3)"); |
1399 break; | 1417 break; |
1400 case STDY: | 1418 case STDY: |
1401 Format(instr, "stdy\t'f1,'d2('r2d,'r3)"); | 1419 Format(instr, "stdy\t'f1,'d2('r2d,'r3)"); |
1402 break; | 1420 break; |
1403 case ADB: | 1421 case ADB: |
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1504 byte* prev_pc = pc; | 1522 byte* prev_pc = pc; |
1505 pc += d.InstructionDecode(buffer, pc); | 1523 pc += d.InstructionDecode(buffer, pc); |
1506 v8::internal::PrintF(f, "%p %08x %s\n", static_cast<void*>(prev_pc), | 1524 v8::internal::PrintF(f, "%p %08x %s\n", static_cast<void*>(prev_pc), |
1507 *reinterpret_cast<int32_t*>(prev_pc), buffer.start()); | 1525 *reinterpret_cast<int32_t*>(prev_pc), buffer.start()); |
1508 } | 1526 } |
1509 } | 1527 } |
1510 | 1528 |
1511 } // namespace disasm | 1529 } // namespace disasm |
1512 | 1530 |
1513 #endif // V8_TARGET_ARCH_S390 | 1531 #endif // V8_TARGET_ARCH_S390 |
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