Index: src/arm64/cpu-arm64.cc |
diff --git a/src/arm64/cpu-arm64.cc b/src/arm64/cpu-arm64.cc |
index 0e1ed91be40996b642a41d524dae24ad4ddccc68..4f69be9d274ee9625d3cbabf568bc2bed38862b4 100644 |
--- a/src/arm64/cpu-arm64.cc |
+++ b/src/arm64/cpu-arm64.cc |
@@ -18,6 +18,7 @@ namespace internal { |
bool CpuFeatures::initialized_ = false; |
#endif |
unsigned CpuFeatures::supported_ = 0; |
+unsigned CpuFeatures::found_by_runtime_probing_only_ = 0; |
unsigned CpuFeatures::cross_compile_ = 0; |
@@ -126,8 +127,24 @@ void CPU::FlushICache(void* address, size_t length) { |
void CpuFeatures::Probe(bool serializer_enabled) { |
- // AArch64 has no configuration options, no further probing is required. |
- supported_ = 0; |
+ ASSERT(supported_ == 0); |
+ |
+ if (serializer_enabled && FLAG_enable_always_align_csp) { |
+ // Always align csp in snapshot code - this is safe and ensures that csp |
+ // will always be aligned if it is enabled by probing at runtime. |
+ supported_ |= static_cast<uint64_t>(1) << ALWAYS_ALIGN_CSP; |
+ } |
+ |
+ if (!serializer_enabled) { |
+ CPU cpu; |
+ // Always align csp on Nvidia cores. |
+ if (cpu.implementer() == CPU::NVIDIA && FLAG_enable_always_align_csp) { |
+ found_by_runtime_probing_only_ |= |
+ static_cast<uint64_t>(1) << ALWAYS_ALIGN_CSP; |
+ } |
+ |
+ supported_ |= found_by_runtime_probing_only_; |
+ } |
#ifdef DEBUG |
initialized_ = true; |