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Issue 264773004: Arm64: Ensure that csp is always aligned to 16 byte values even if jssp is not. (Closed) Base URL: https://v8.googlecode.com/svn/branches/bleeding_edge
Patch Set: Sync Created 6 years, 7 months ago
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1 // Copyright 2013 the V8 project authors. All rights reserved. 1 // Copyright 2013 the V8 project authors. All rights reserved.
2 // Use of this source code is governed by a BSD-style license that can be 2 // Use of this source code is governed by a BSD-style license that can be
3 // found in the LICENSE file. 3 // found in the LICENSE file.
4 4
5 #include "cpu.h" 5 #include "cpu.h"
6 6
7 #if V8_LIBC_MSVCRT 7 #if V8_LIBC_MSVCRT
8 #include <intrin.h> // __cpuid() 8 #include <intrin.h> // __cpuid()
9 #endif 9 #endif
10 #if V8_OS_POSIX 10 #if V8_OS_POSIX
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49 __asm__ volatile ( 49 __asm__ volatile (
50 "cpuid \n\t" 50 "cpuid \n\t"
51 : "=a"(cpu_info[0]), "=b"(cpu_info[1]), "=c"(cpu_info[2]), "=d"(cpu_info[3]) 51 : "=a"(cpu_info[0]), "=b"(cpu_info[1]), "=c"(cpu_info[2]), "=d"(cpu_info[3])
52 : "a"(info_type) 52 : "a"(info_type)
53 ); 53 );
54 #endif // defined(__i386__) && defined(__pic__) 54 #endif // defined(__i386__) && defined(__pic__)
55 } 55 }
56 56
57 #endif // !V8_LIBC_MSVCRT 57 #endif // !V8_LIBC_MSVCRT
58 58
59 #elif V8_HOST_ARCH_ARM || V8_HOST_ARCH_MIPS 59 #elif V8_HOST_ARCH_ARM || V8_HOST_ARCH_ARM64 || V8_HOST_ARCH_MIPS
60 60
61 #if V8_OS_LINUX 61 #if V8_OS_LINUX
62 62
63 #if V8_HOST_ARCH_ARM 63 #if V8_HOST_ARCH_ARM
64 64
65 // See <uapi/asm/hwcap.h> kernel header. 65 // See <uapi/asm/hwcap.h> kernel header.
66 /* 66 /*
67 * HWCAP flags - for elf_hwcap (in kernel) and AT_HWCAP 67 * HWCAP flags - for elf_hwcap (in kernel) and AT_HWCAP
68 */ 68 */
69 #define HWCAP_SWP (1 << 0) 69 #define HWCAP_SWP (1 << 0)
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457 // Simple detection of FPU at runtime for Linux. 457 // Simple detection of FPU at runtime for Linux.
458 // It is based on /proc/cpuinfo, which reveals hardware configuration 458 // It is based on /proc/cpuinfo, which reveals hardware configuration
459 // to user-space applications. According to MIPS (early 2010), no similar 459 // to user-space applications. According to MIPS (early 2010), no similar
460 // facility is universally available on the MIPS architectures, 460 // facility is universally available on the MIPS architectures,
461 // so it's up to individual OSes to provide such. 461 // so it's up to individual OSes to provide such.
462 CPUInfo cpu_info; 462 CPUInfo cpu_info;
463 char* cpu_model = cpu_info.ExtractField("cpu model"); 463 char* cpu_model = cpu_info.ExtractField("cpu model");
464 has_fpu_ = HasListItem(cpu_model, "FPU"); 464 has_fpu_ = HasListItem(cpu_model, "FPU");
465 delete[] cpu_model; 465 delete[] cpu_model;
466 466
467 #elif V8_HOST_ARCH_ARM64
468
469 CPUInfo cpu_info;
470
471 // Extract implementor from the "CPU implementer" field.
472 char* implementer = cpu_info.ExtractField("CPU implementer");
473 if (implementer != NULL) {
474 char* end ;
475 implementer_ = strtol(implementer, &end, 0);
476 if (end == implementer) {
477 implementer_ = 0;
478 }
479 delete[] implementer;
480 }
481
482 // Extract part number from the "CPU part" field.
483 char* part = cpu_info.ExtractField("CPU part");
484 if (part != NULL) {
485 char* end ;
486 part_ = strtol(part, &end, 0);
487 if (end == part) {
488 part_ = 0;
489 }
490 delete[] part;
491 }
492
467 #endif 493 #endif
468 } 494 }
469 495
470 496
471 // static 497 // static
472 int CPU::NumberOfProcessorsOnline() { 498 int CPU::NumberOfProcessorsOnline() {
473 #if V8_OS_WIN 499 #if V8_OS_WIN
474 SYSTEM_INFO info; 500 SYSTEM_INFO info;
475 GetSystemInfo(&info); 501 GetSystemInfo(&info);
476 return info.dwNumberOfProcessors; 502 return info.dwNumberOfProcessors;
477 #else 503 #else
478 return static_cast<int>(sysconf(_SC_NPROCESSORS_ONLN)); 504 return static_cast<int>(sysconf(_SC_NPROCESSORS_ONLN));
479 #endif 505 #endif
480 } 506 }
481 507
482 } } // namespace v8::internal 508 } } // namespace v8::internal
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