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Issue 2639443002: [ARM] Refactor NEON binary ops in assembler. (Closed)
Patch Set: Make NeonDataType match NeonSize. Created 3 years, 11 months ago
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1 // Copyright 2012 the V8 project authors. All rights reserved. 1 // Copyright 2012 the V8 project authors. All rights reserved.
2 // Use of this source code is governed by a BSD-style license that can be 2 // Use of this source code is governed by a BSD-style license that can be
3 // found in the LICENSE file. 3 // found in the LICENSE file.
4 4
5 #include <limits.h> // For LONG_MIN, LONG_MAX. 5 #include <limits.h> // For LONG_MIN, LONG_MAX.
6 6
7 #if V8_TARGET_ARCH_ARM 7 #if V8_TARGET_ARCH_ARM
8 8
9 #include "src/base/bits.h" 9 #include "src/base/bits.h"
10 #include "src/base/division-by-constant.h" 10 #include "src/base/division-by-constant.h"
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1139 if (src_code >= SwVfpRegister::kMaxNumRegisters) { 1139 if (src_code >= SwVfpRegister::kMaxNumRegisters) {
1140 VmovExtended(scratch, src_code); 1140 VmovExtended(scratch, src_code);
1141 str(scratch, dst); 1141 str(scratch, dst);
1142 } else { 1142 } else {
1143 vstr(SwVfpRegister::from_code(src_code), dst); 1143 vstr(SwVfpRegister::from_code(src_code), dst);
1144 } 1144 }
1145 } 1145 }
1146 1146
1147 void MacroAssembler::ExtractLane(Register dst, QwNeonRegister src, 1147 void MacroAssembler::ExtractLane(Register dst, QwNeonRegister src,
1148 NeonDataType dt, int lane) { 1148 NeonDataType dt, int lane) {
1149 int bytes_per_lane = dt & NeonDataTypeSizeMask; // 1, 2, 4 1149 int size = NeonSz(dt); // 0, 1, 2
1150 int log2_bytes_per_lane = bytes_per_lane / 2; // 0, 1, 2 1150 int byte = lane << size;
1151 int byte = lane << log2_bytes_per_lane;
1152 int double_word = byte >> kDoubleSizeLog2; 1151 int double_word = byte >> kDoubleSizeLog2;
1153 int double_byte = byte & (kDoubleSize - 1); 1152 int double_byte = byte & (kDoubleSize - 1);
1154 int double_lane = double_byte >> log2_bytes_per_lane; 1153 int double_lane = double_byte >> size;
1155 DwVfpRegister double_source = 1154 DwVfpRegister double_source =
1156 DwVfpRegister::from_code(src.code() * 2 + double_word); 1155 DwVfpRegister::from_code(src.code() * 2 + double_word);
1157 vmov(dt, dst, double_source, double_lane); 1156 vmov(dt, dst, double_source, double_lane);
1158 } 1157 }
1159 1158
1160 void MacroAssembler::ExtractLane(SwVfpRegister dst, QwNeonRegister src, 1159 void MacroAssembler::ExtractLane(SwVfpRegister dst, QwNeonRegister src,
1161 Register scratch, int lane) { 1160 Register scratch, int lane) {
1162 int s_code = src.code() * 4 + lane; 1161 int s_code = src.code() * 4 + lane;
1163 VmovExtended(dst.code(), s_code, scratch); 1162 VmovExtended(dst.code(), s_code, scratch);
1164 } 1163 }
1165 1164
1166 void MacroAssembler::ReplaceLane(QwNeonRegister dst, QwNeonRegister src, 1165 void MacroAssembler::ReplaceLane(QwNeonRegister dst, QwNeonRegister src,
1167 Register src_lane, NeonDataType dt, int lane) { 1166 Register src_lane, NeonDataType dt, int lane) {
1168 Move(dst, src); 1167 Move(dst, src);
1169 int bytes_per_lane = dt & NeonDataTypeSizeMask; // 1, 2, 4 1168 int size = NeonSz(dt); // 0, 1, 2
1170 int log2_bytes_per_lane = bytes_per_lane / 2; // 0, 1, 2 1169 int byte = lane << size;
1171 int byte = lane << log2_bytes_per_lane;
1172 int double_word = byte >> kDoubleSizeLog2; 1170 int double_word = byte >> kDoubleSizeLog2;
1173 int double_byte = byte & (kDoubleSize - 1); 1171 int double_byte = byte & (kDoubleSize - 1);
1174 int double_lane = double_byte >> log2_bytes_per_lane; 1172 int double_lane = double_byte >> size;
1175 DwVfpRegister double_dst = 1173 DwVfpRegister double_dst =
1176 DwVfpRegister::from_code(dst.code() * 2 + double_word); 1174 DwVfpRegister::from_code(dst.code() * 2 + double_word);
1177 vmov(dt, double_dst, double_lane, src_lane); 1175 vmov(dt, double_dst, double_lane, src_lane);
1178 } 1176 }
1179 1177
1180 void MacroAssembler::ReplaceLane(QwNeonRegister dst, QwNeonRegister src, 1178 void MacroAssembler::ReplaceLane(QwNeonRegister dst, QwNeonRegister src,
1181 SwVfpRegister src_lane, Register scratch, 1179 SwVfpRegister src_lane, Register scratch,
1182 int lane) { 1180 int lane) {
1183 Move(dst, src); 1181 Move(dst, src);
1184 int s_code = dst.code() * 4 + lane; 1182 int s_code = dst.code() * 4 + lane;
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3870 } 3868 }
3871 } 3869 }
3872 if (mag.shift > 0) mov(result, Operand(result, ASR, mag.shift)); 3870 if (mag.shift > 0) mov(result, Operand(result, ASR, mag.shift));
3873 add(result, result, Operand(dividend, LSR, 31)); 3871 add(result, result, Operand(dividend, LSR, 31));
3874 } 3872 }
3875 3873
3876 } // namespace internal 3874 } // namespace internal
3877 } // namespace v8 3875 } // namespace v8
3878 3876
3879 #endif // V8_TARGET_ARCH_ARM 3877 #endif // V8_TARGET_ARCH_ARM
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