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| 1 // Copyright 2015 the V8 project authors. All rights reserved. | 1 // Copyright 2015 the V8 project authors. All rights reserved. |
| 2 // Use of this source code is governed by a BSD-style license that can be | 2 // Use of this source code is governed by a BSD-style license that can be |
| 3 // found in the LICENSE file. | 3 // found in the LICENSE file. |
| 4 | 4 |
| 5 #include "src/compiler/instruction-scheduler.h" | 5 #include "src/compiler/instruction-scheduler.h" |
| 6 | 6 |
| 7 namespace v8 { | 7 namespace v8 { |
| 8 namespace internal { | 8 namespace internal { |
| 9 namespace compiler { | 9 namespace compiler { |
| 10 | 10 |
| (...skipping 106 matching lines...) Expand 10 before | Expand all | Expand 10 after Loading... |
| 117 case kArmFloat32x4Neg: | 117 case kArmFloat32x4Neg: |
| 118 case kArmFloat32x4Add: | 118 case kArmFloat32x4Add: |
| 119 case kArmFloat32x4Sub: | 119 case kArmFloat32x4Sub: |
| 120 case kArmFloat32x4Eq: | 120 case kArmFloat32x4Eq: |
| 121 case kArmFloat32x4Ne: | 121 case kArmFloat32x4Ne: |
| 122 case kArmInt32x4Splat: | 122 case kArmInt32x4Splat: |
| 123 case kArmInt32x4ExtractLane: | 123 case kArmInt32x4ExtractLane: |
| 124 case kArmInt32x4ReplaceLane: | 124 case kArmInt32x4ReplaceLane: |
| 125 case kArmInt32x4FromFloat32x4: | 125 case kArmInt32x4FromFloat32x4: |
| 126 case kArmUint32x4FromFloat32x4: | 126 case kArmUint32x4FromFloat32x4: |
| 127 case kArmInt32x4Neg: |
| 127 case kArmInt32x4Add: | 128 case kArmInt32x4Add: |
| 128 case kArmInt32x4Sub: | 129 case kArmInt32x4Sub: |
| 130 case kArmInt32x4Mul: |
| 131 case kArmInt32x4Min: |
| 132 case kArmInt32x4Max: |
| 129 case kArmInt32x4Eq: | 133 case kArmInt32x4Eq: |
| 130 case kArmInt32x4Ne: | 134 case kArmInt32x4Ne: |
| 135 case kArmInt32x4Gt: |
| 136 case kArmInt32x4Ge: |
| 137 case kArmUint32x4Gt: |
| 138 case kArmUint32x4Ge: |
| 131 case kArmSimd32x4Select: | 139 case kArmSimd32x4Select: |
| 140 case kArmInt16x8Splat: |
| 141 case kArmInt16x8ExtractLane: |
| 142 case kArmInt16x8ReplaceLane: |
| 143 case kArmInt16x8Neg: |
| 144 case kArmInt16x8Add: |
| 145 case kArmInt16x8Sub: |
| 146 case kArmInt16x8Mul: |
| 147 case kArmInt16x8Min: |
| 148 case kArmInt16x8Max: |
| 149 case kArmInt16x8Eq: |
| 150 case kArmInt16x8Ne: |
| 151 case kArmInt16x8Gt: |
| 152 case kArmInt16x8Ge: |
| 153 case kArmUint16x8Gt: |
| 154 case kArmUint16x8Ge: |
| 155 case kArmInt8x16Splat: |
| 156 case kArmInt8x16ExtractLane: |
| 157 case kArmInt8x16ReplaceLane: |
| 158 case kArmInt8x16Neg: |
| 159 case kArmInt8x16Add: |
| 160 case kArmInt8x16Sub: |
| 161 case kArmInt8x16Mul: |
| 162 case kArmInt8x16Min: |
| 163 case kArmInt8x16Max: |
| 164 case kArmInt8x16Eq: |
| 165 case kArmInt8x16Ne: |
| 166 case kArmInt8x16Gt: |
| 167 case kArmInt8x16Ge: |
| 168 case kArmUint8x16Gt: |
| 169 case kArmUint8x16Ge: |
| 132 return kNoOpcodeFlags; | 170 return kNoOpcodeFlags; |
| 133 | 171 |
| 134 case kArmVldrF32: | 172 case kArmVldrF32: |
| 135 case kArmVldrF64: | 173 case kArmVldrF64: |
| 136 case kArmLdrb: | 174 case kArmLdrb: |
| 137 case kArmLdrsb: | 175 case kArmLdrsb: |
| 138 case kArmLdrh: | 176 case kArmLdrh: |
| 139 case kArmLdrsh: | 177 case kArmLdrsh: |
| 140 case kArmLdr: | 178 case kArmLdr: |
| 141 return kIsLoadOperation; | 179 return kIsLoadOperation; |
| (...skipping 20 matching lines...) Expand all Loading... |
| 162 | 200 |
| 163 | 201 |
| 164 int InstructionScheduler::GetInstructionLatency(const Instruction* instr) { | 202 int InstructionScheduler::GetInstructionLatency(const Instruction* instr) { |
| 165 // TODO(all): Add instruction cost modeling. | 203 // TODO(all): Add instruction cost modeling. |
| 166 return 1; | 204 return 1; |
| 167 } | 205 } |
| 168 | 206 |
| 169 } // namespace compiler | 207 } // namespace compiler |
| 170 } // namespace internal | 208 } // namespace internal |
| 171 } // namespace v8 | 209 } // namespace v8 |
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Chromium Code Reviews
Issue 2638133002:
[Turbofan] Add other integer SIMD types, add more integer ops. (Closed)
