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1 // Copyright 2014 the V8 project authors. All rights reserved. | 1 // Copyright 2014 the V8 project authors. All rights reserved. |
2 // Use of this source code is governed by a BSD-style license that can be | 2 // Use of this source code is governed by a BSD-style license that can be |
3 // found in the LICENSE file. | 3 // found in the LICENSE file. |
4 | 4 |
5 #include "src/base/adapters.h" | 5 #include "src/base/adapters.h" |
6 #include "src/base/bits.h" | 6 #include "src/base/bits.h" |
7 #include "src/compiler/instruction-selector-impl.h" | 7 #include "src/compiler/instruction-selector-impl.h" |
8 #include "src/compiler/node-matchers.h" | 8 #include "src/compiler/node-matchers.h" |
9 #include "src/compiler/node-properties.h" | 9 #include "src/compiler/node-properties.h" |
10 | 10 |
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2379 Emit(kArmInt32x4FromFloat32x4, g.DefineAsRegister(node), | 2379 Emit(kArmInt32x4FromFloat32x4, g.DefineAsRegister(node), |
2380 g.UseRegister(node->InputAt(0))); | 2380 g.UseRegister(node->InputAt(0))); |
2381 } | 2381 } |
2382 | 2382 |
2383 void InstructionSelector::VisitUint32x4FromFloat32x4(Node* node) { | 2383 void InstructionSelector::VisitUint32x4FromFloat32x4(Node* node) { |
2384 ArmOperandGenerator g(this); | 2384 ArmOperandGenerator g(this); |
2385 Emit(kArmUint32x4FromFloat32x4, g.DefineAsRegister(node), | 2385 Emit(kArmUint32x4FromFloat32x4, g.DefineAsRegister(node), |
2386 g.UseRegister(node->InputAt(0))); | 2386 g.UseRegister(node->InputAt(0))); |
2387 } | 2387 } |
2388 | 2388 |
2389 void InstructionSelector::VisitInt32x4Neg(Node* node) { | |
titzer
2017/01/25 09:47:25
I think it's time to macro-ify these methods, but
bbudge
2017/01/26 02:04:43
Added a TODO.
| |
2390 ArmOperandGenerator g(this); | |
2391 Emit(kArmInt32x4Neg, g.DefineAsRegister(node), | |
2392 g.UseRegister(node->InputAt(0))); | |
2393 } | |
2394 | |
2389 void InstructionSelector::VisitInt32x4Add(Node* node) { | 2395 void InstructionSelector::VisitInt32x4Add(Node* node) { |
2390 ArmOperandGenerator g(this); | 2396 ArmOperandGenerator g(this); |
2391 Emit(kArmInt32x4Add, g.DefineAsRegister(node), | 2397 Emit(kArmInt32x4Add, g.DefineAsRegister(node), |
2392 g.UseRegister(node->InputAt(0)), g.UseRegister(node->InputAt(1))); | 2398 g.UseRegister(node->InputAt(0)), g.UseRegister(node->InputAt(1))); |
2393 } | 2399 } |
2394 | 2400 |
2395 void InstructionSelector::VisitInt32x4Sub(Node* node) { | 2401 void InstructionSelector::VisitInt32x4Sub(Node* node) { |
2396 ArmOperandGenerator g(this); | 2402 ArmOperandGenerator g(this); |
2397 Emit(kArmInt32x4Sub, g.DefineAsRegister(node), | 2403 Emit(kArmInt32x4Sub, g.DefineAsRegister(node), |
2398 g.UseRegister(node->InputAt(0)), g.UseRegister(node->InputAt(1))); | 2404 g.UseRegister(node->InputAt(0)), g.UseRegister(node->InputAt(1))); |
2399 } | 2405 } |
2400 | 2406 |
2407 void InstructionSelector::VisitInt32x4Mul(Node* node) { | |
2408 ArmOperandGenerator g(this); | |
2409 Emit(kArmInt32x4Mul, g.DefineAsRegister(node), | |
2410 g.UseRegister(node->InputAt(0)), g.UseRegister(node->InputAt(1))); | |
2411 } | |
2412 | |
2413 void InstructionSelector::VisitInt32x4Min(Node* node) { | |
2414 ArmOperandGenerator g(this); | |
2415 Emit(kArmInt32x4Min, g.DefineAsRegister(node), | |
2416 g.UseRegister(node->InputAt(0)), g.UseRegister(node->InputAt(1))); | |
2417 } | |
2418 | |
2419 void InstructionSelector::VisitInt32x4Max(Node* node) { | |
2420 ArmOperandGenerator g(this); | |
2421 Emit(kArmInt32x4Max, g.DefineAsRegister(node), | |
2422 g.UseRegister(node->InputAt(0)), g.UseRegister(node->InputAt(1))); | |
2423 } | |
2424 | |
2401 void InstructionSelector::VisitInt32x4Equal(Node* node) { | 2425 void InstructionSelector::VisitInt32x4Equal(Node* node) { |
2402 ArmOperandGenerator g(this); | 2426 ArmOperandGenerator g(this); |
2403 Emit(kArmInt32x4Eq, g.DefineAsRegister(node), g.UseRegister(node->InputAt(0)), | 2427 Emit(kArmInt32x4Eq, g.DefineAsRegister(node), g.UseRegister(node->InputAt(0)), |
2404 g.UseRegister(node->InputAt(1))); | 2428 g.UseRegister(node->InputAt(1))); |
2405 } | 2429 } |
2406 | 2430 |
2407 void InstructionSelector::VisitInt32x4NotEqual(Node* node) { | 2431 void InstructionSelector::VisitInt32x4NotEqual(Node* node) { |
2408 ArmOperandGenerator g(this); | 2432 ArmOperandGenerator g(this); |
2409 Emit(kArmInt32x4Ne, g.DefineAsRegister(node), g.UseRegister(node->InputAt(0)), | 2433 Emit(kArmInt32x4Ne, g.DefineAsRegister(node), g.UseRegister(node->InputAt(0)), |
2410 g.UseRegister(node->InputAt(1))); | 2434 g.UseRegister(node->InputAt(1))); |
2411 } | 2435 } |
2412 | 2436 |
2437 void InstructionSelector::VisitInt32x4GreaterThan(Node* node) { | |
2438 ArmOperandGenerator g(this); | |
2439 Emit(kArmInt32x4Gt, g.DefineAsRegister(node), g.UseRegister(node->InputAt(0)), | |
2440 g.UseRegister(node->InputAt(1))); | |
2441 } | |
2442 | |
2443 void InstructionSelector::VisitInt32x4GreaterThanOrEqual(Node* node) { | |
2444 ArmOperandGenerator g(this); | |
2445 Emit(kArmInt32x4Ge, g.DefineAsRegister(node), g.UseRegister(node->InputAt(0)), | |
2446 g.UseRegister(node->InputAt(1))); | |
2447 } | |
2448 | |
2449 void InstructionSelector::VisitUint32x4GreaterThan(Node* node) { | |
2450 ArmOperandGenerator g(this); | |
2451 Emit(kArmUint32x4Gt, g.DefineAsRegister(node), | |
2452 g.UseRegister(node->InputAt(0)), g.UseRegister(node->InputAt(1))); | |
2453 } | |
2454 | |
2455 void InstructionSelector::VisitUint32x4GreaterThanOrEqual(Node* node) { | |
2456 ArmOperandGenerator g(this); | |
2457 Emit(kArmUint32x4Ge, g.DefineAsRegister(node), | |
2458 g.UseRegister(node->InputAt(0)), g.UseRegister(node->InputAt(1))); | |
2459 } | |
2460 | |
2413 void InstructionSelector::VisitSimd32x4Select(Node* node) { | 2461 void InstructionSelector::VisitSimd32x4Select(Node* node) { |
2414 ArmOperandGenerator g(this); | 2462 ArmOperandGenerator g(this); |
2415 Emit(kArmSimd32x4Select, g.DefineAsRegister(node), | 2463 Emit(kArmSimd32x4Select, g.DefineAsRegister(node), |
2416 g.UseRegister(node->InputAt(0)), g.UseRegister(node->InputAt(1)), | 2464 g.UseRegister(node->InputAt(0)), g.UseRegister(node->InputAt(1)), |
2417 g.UseRegister(node->InputAt(2))); | 2465 g.UseRegister(node->InputAt(2))); |
2418 } | 2466 } |
2419 | 2467 |
2468 void InstructionSelector::VisitCreateInt16x8(Node* node) { | |
2469 ArmOperandGenerator g(this); | |
2470 Emit(kArmInt16x8Splat, g.DefineAsRegister(node), g.Use(node->InputAt(0))); | |
2471 } | |
2472 | |
2473 void InstructionSelector::VisitInt16x8ExtractLane(Node* node) { | |
2474 ArmOperandGenerator g(this); | |
2475 int32_t lane = OpParameter<int32_t>(node); | |
2476 Emit(kArmInt16x8ExtractLane, g.DefineAsRegister(node), | |
2477 g.UseRegister(node->InputAt(0)), g.UseImmediate(lane)); | |
2478 } | |
2479 | |
2480 void InstructionSelector::VisitInt16x8ReplaceLane(Node* node) { | |
2481 ArmOperandGenerator g(this); | |
2482 int32_t lane = OpParameter<int32_t>(node); | |
2483 Emit(kArmInt16x8ReplaceLane, g.DefineAsRegister(node), | |
2484 g.UseRegister(node->InputAt(0)), g.UseImmediate(lane), | |
2485 g.Use(node->InputAt(1))); | |
2486 } | |
2487 | |
2488 void InstructionSelector::VisitInt16x8Neg(Node* node) { | |
2489 ArmOperandGenerator g(this); | |
2490 Emit(kArmInt16x8Neg, g.DefineAsRegister(node), | |
2491 g.UseRegister(node->InputAt(0))); | |
2492 } | |
2493 | |
2494 void InstructionSelector::VisitInt16x8Add(Node* node) { | |
2495 ArmOperandGenerator g(this); | |
2496 Emit(kArmInt16x8Add, g.DefineAsRegister(node), | |
2497 g.UseRegister(node->InputAt(0)), g.UseRegister(node->InputAt(1))); | |
2498 } | |
2499 | |
2500 void InstructionSelector::VisitInt16x8Sub(Node* node) { | |
2501 ArmOperandGenerator g(this); | |
2502 Emit(kArmInt16x8Sub, g.DefineAsRegister(node), | |
2503 g.UseRegister(node->InputAt(0)), g.UseRegister(node->InputAt(1))); | |
2504 } | |
2505 | |
2506 void InstructionSelector::VisitInt16x8Mul(Node* node) { | |
2507 ArmOperandGenerator g(this); | |
2508 Emit(kArmInt16x8Mul, g.DefineAsRegister(node), | |
2509 g.UseRegister(node->InputAt(0)), g.UseRegister(node->InputAt(1))); | |
2510 } | |
2511 | |
2512 void InstructionSelector::VisitInt16x8Min(Node* node) { | |
2513 ArmOperandGenerator g(this); | |
2514 Emit(kArmInt16x8Min, g.DefineAsRegister(node), | |
2515 g.UseRegister(node->InputAt(0)), g.UseRegister(node->InputAt(1))); | |
2516 } | |
2517 | |
2518 void InstructionSelector::VisitInt16x8Max(Node* node) { | |
2519 ArmOperandGenerator g(this); | |
2520 Emit(kArmInt16x8Max, g.DefineAsRegister(node), | |
2521 g.UseRegister(node->InputAt(0)), g.UseRegister(node->InputAt(1))); | |
2522 } | |
2523 | |
2524 void InstructionSelector::VisitInt16x8Equal(Node* node) { | |
2525 ArmOperandGenerator g(this); | |
2526 Emit(kArmInt16x8Eq, g.DefineAsRegister(node), g.UseRegister(node->InputAt(0)), | |
2527 g.UseRegister(node->InputAt(1))); | |
2528 } | |
2529 | |
2530 void InstructionSelector::VisitInt16x8NotEqual(Node* node) { | |
2531 ArmOperandGenerator g(this); | |
2532 Emit(kArmInt16x8Ne, g.DefineAsRegister(node), g.UseRegister(node->InputAt(0)), | |
2533 g.UseRegister(node->InputAt(1))); | |
2534 } | |
2535 | |
2536 void InstructionSelector::VisitInt16x8GreaterThan(Node* node) { | |
2537 ArmOperandGenerator g(this); | |
2538 Emit(kArmInt16x8Gt, g.DefineAsRegister(node), g.UseRegister(node->InputAt(0)), | |
2539 g.UseRegister(node->InputAt(1))); | |
2540 } | |
2541 | |
2542 void InstructionSelector::VisitInt16x8GreaterThanOrEqual(Node* node) { | |
2543 ArmOperandGenerator g(this); | |
2544 Emit(kArmInt16x8Ge, g.DefineAsRegister(node), g.UseRegister(node->InputAt(0)), | |
2545 g.UseRegister(node->InputAt(1))); | |
2546 } | |
2547 | |
2548 void InstructionSelector::VisitUint16x8GreaterThan(Node* node) { | |
2549 ArmOperandGenerator g(this); | |
2550 Emit(kArmUint16x8Gt, g.DefineAsRegister(node), | |
2551 g.UseRegister(node->InputAt(0)), g.UseRegister(node->InputAt(1))); | |
2552 } | |
2553 | |
2554 void InstructionSelector::VisitUint16x8GreaterThanOrEqual(Node* node) { | |
2555 ArmOperandGenerator g(this); | |
2556 Emit(kArmUint16x8Ge, g.DefineAsRegister(node), | |
2557 g.UseRegister(node->InputAt(0)), g.UseRegister(node->InputAt(1))); | |
2558 } | |
2559 | |
2560 void InstructionSelector::VisitCreateInt8x16(Node* node) { | |
2561 ArmOperandGenerator g(this); | |
2562 Emit(kArmInt8x16Splat, g.DefineAsRegister(node), g.Use(node->InputAt(0))); | |
2563 } | |
2564 | |
2565 void InstructionSelector::VisitInt8x16ExtractLane(Node* node) { | |
2566 ArmOperandGenerator g(this); | |
2567 int32_t lane = OpParameter<int32_t>(node); | |
2568 Emit(kArmInt8x16ExtractLane, g.DefineAsRegister(node), | |
2569 g.UseRegister(node->InputAt(0)), g.UseImmediate(lane)); | |
2570 } | |
2571 | |
2572 void InstructionSelector::VisitInt8x16ReplaceLane(Node* node) { | |
2573 ArmOperandGenerator g(this); | |
2574 int32_t lane = OpParameter<int32_t>(node); | |
2575 Emit(kArmInt8x16ReplaceLane, g.DefineAsRegister(node), | |
2576 g.UseRegister(node->InputAt(0)), g.UseImmediate(lane), | |
2577 g.Use(node->InputAt(1))); | |
2578 } | |
2579 | |
2580 void InstructionSelector::VisitInt8x16Neg(Node* node) { | |
2581 ArmOperandGenerator g(this); | |
2582 Emit(kArmInt8x16Neg, g.DefineAsRegister(node), | |
2583 g.UseRegister(node->InputAt(0))); | |
2584 } | |
2585 | |
2586 void InstructionSelector::VisitInt8x16Add(Node* node) { | |
2587 ArmOperandGenerator g(this); | |
2588 Emit(kArmInt8x16Add, g.DefineAsRegister(node), | |
2589 g.UseRegister(node->InputAt(0)), g.UseRegister(node->InputAt(1))); | |
2590 } | |
2591 | |
2592 void InstructionSelector::VisitInt8x16Sub(Node* node) { | |
2593 ArmOperandGenerator g(this); | |
2594 Emit(kArmInt8x16Sub, g.DefineAsRegister(node), | |
2595 g.UseRegister(node->InputAt(0)), g.UseRegister(node->InputAt(1))); | |
2596 } | |
2597 | |
2598 void InstructionSelector::VisitInt8x16Mul(Node* node) { | |
2599 ArmOperandGenerator g(this); | |
2600 Emit(kArmInt8x16Mul, g.DefineAsRegister(node), | |
2601 g.UseRegister(node->InputAt(0)), g.UseRegister(node->InputAt(1))); | |
2602 } | |
2603 | |
2604 void InstructionSelector::VisitInt8x16Min(Node* node) { | |
2605 ArmOperandGenerator g(this); | |
2606 Emit(kArmInt8x16Min, g.DefineAsRegister(node), | |
2607 g.UseRegister(node->InputAt(0)), g.UseRegister(node->InputAt(1))); | |
2608 } | |
2609 | |
2610 void InstructionSelector::VisitInt8x16Max(Node* node) { | |
2611 ArmOperandGenerator g(this); | |
2612 Emit(kArmInt8x16Max, g.DefineAsRegister(node), | |
2613 g.UseRegister(node->InputAt(0)), g.UseRegister(node->InputAt(1))); | |
2614 } | |
2615 | |
2616 void InstructionSelector::VisitInt8x16Equal(Node* node) { | |
2617 ArmOperandGenerator g(this); | |
2618 Emit(kArmInt8x16Eq, g.DefineAsRegister(node), g.UseRegister(node->InputAt(0)), | |
2619 g.UseRegister(node->InputAt(1))); | |
2620 } | |
2621 | |
2622 void InstructionSelector::VisitInt8x16NotEqual(Node* node) { | |
2623 ArmOperandGenerator g(this); | |
2624 Emit(kArmInt8x16Ne, g.DefineAsRegister(node), g.UseRegister(node->InputAt(0)), | |
2625 g.UseRegister(node->InputAt(1))); | |
2626 } | |
2627 | |
2628 void InstructionSelector::VisitInt8x16GreaterThan(Node* node) { | |
2629 ArmOperandGenerator g(this); | |
2630 Emit(kArmInt8x16Gt, g.DefineAsRegister(node), g.UseRegister(node->InputAt(0)), | |
2631 g.UseRegister(node->InputAt(1))); | |
2632 } | |
2633 | |
2634 void InstructionSelector::VisitInt8x16GreaterThanOrEqual(Node* node) { | |
2635 ArmOperandGenerator g(this); | |
2636 Emit(kArmInt8x16Ge, g.DefineAsRegister(node), g.UseRegister(node->InputAt(0)), | |
2637 g.UseRegister(node->InputAt(1))); | |
2638 } | |
2639 | |
2640 void InstructionSelector::VisitUint8x16GreaterThan(Node* node) { | |
2641 ArmOperandGenerator g(this); | |
2642 Emit(kArmUint8x16Gt, g.DefineAsRegister(node), | |
2643 g.UseRegister(node->InputAt(0)), g.UseRegister(node->InputAt(1))); | |
2644 } | |
2645 | |
2646 void InstructionSelector::VisitUint8x16GreaterThanOrEqual(Node* node) { | |
2647 ArmOperandGenerator g(this); | |
2648 Emit(kArmUint8x16Ge, g.DefineAsRegister(node), | |
2649 g.UseRegister(node->InputAt(0)), g.UseRegister(node->InputAt(1))); | |
2650 } | |
2651 | |
2420 // static | 2652 // static |
2421 MachineOperatorBuilder::Flags | 2653 MachineOperatorBuilder::Flags |
2422 InstructionSelector::SupportedMachineOperatorFlags() { | 2654 InstructionSelector::SupportedMachineOperatorFlags() { |
2423 MachineOperatorBuilder::Flags flags; | 2655 MachineOperatorBuilder::Flags flags; |
2424 if (CpuFeatures::IsSupported(SUDIV)) { | 2656 if (CpuFeatures::IsSupported(SUDIV)) { |
2425 // The sdiv and udiv instructions correctly return 0 if the divisor is 0, | 2657 // The sdiv and udiv instructions correctly return 0 if the divisor is 0, |
2426 // but the fall-back implementation does not. | 2658 // but the fall-back implementation does not. |
2427 flags |= MachineOperatorBuilder::kInt32DivIsSafe | | 2659 flags |= MachineOperatorBuilder::kInt32DivIsSafe | |
2428 MachineOperatorBuilder::kUint32DivIsSafe; | 2660 MachineOperatorBuilder::kUint32DivIsSafe; |
2429 } | 2661 } |
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2450 Vector<MachineType> req_aligned = Vector<MachineType>::New(2); | 2682 Vector<MachineType> req_aligned = Vector<MachineType>::New(2); |
2451 req_aligned[0] = MachineType::Float32(); | 2683 req_aligned[0] = MachineType::Float32(); |
2452 req_aligned[1] = MachineType::Float64(); | 2684 req_aligned[1] = MachineType::Float64(); |
2453 return MachineOperatorBuilder::AlignmentRequirements:: | 2685 return MachineOperatorBuilder::AlignmentRequirements:: |
2454 SomeUnalignedAccessUnsupported(req_aligned, req_aligned); | 2686 SomeUnalignedAccessUnsupported(req_aligned, req_aligned); |
2455 } | 2687 } |
2456 | 2688 |
2457 } // namespace compiler | 2689 } // namespace compiler |
2458 } // namespace internal | 2690 } // namespace internal |
2459 } // namespace v8 | 2691 } // namespace v8 |
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