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Issue 263243002: Enables many language tests for arm64. (Closed) Base URL: http://dart.googlecode.com/svn/branches/bleeding_edge/dart/
Patch Set: Created 6 years, 7 months ago
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1 // Copyright (c) 2014, the Dart project authors. Please see the AUTHORS file 1 // Copyright (c) 2014, the Dart project authors. Please see the AUTHORS file
2 // for details. All rights reserved. Use of this source code is governed by a 2 // for details. All rights reserved. Use of this source code is governed by a
3 // BSD-style license that can be found in the LICENSE file. 3 // BSD-style license that can be found in the LICENSE file.
4 4
5 #include "vm/globals.h" 5 #include "vm/globals.h"
6 #if defined(TARGET_ARCH_ARM64) 6 #if defined(TARGET_ARCH_ARM64)
7 7
8 #include "vm/assembler.h" 8 #include "vm/assembler.h"
9 #include "vm/cpu.h" 9 #include "vm/cpu.h"
10 #include "vm/longjump.h" 10 #include "vm/longjump.h"
(...skipping 559 matching lines...) Expand 10 before | Expand all | Expand 10 after
570 if (!fmovdi(vd, immd)) { 570 if (!fmovdi(vd, immd)) {
571 int64_t imm = bit_cast<int64_t, double>(immd); 571 int64_t imm = bit_cast<int64_t, double>(immd);
572 LoadImmediate(TMP, imm, pp); 572 LoadImmediate(TMP, imm, pp);
573 fmovdr(vd, TMP); 573 fmovdr(vd, TMP);
574 } 574 }
575 } 575 }
576 576
577 577
578 void Assembler::AddImmediate( 578 void Assembler::AddImmediate(
579 Register dest, Register rn, int64_t imm, Register pp) { 579 Register dest, Register rn, int64_t imm, Register pp) {
580 ASSERT(rn != TMP2);
581 Operand op; 580 Operand op;
582 if (Operand::CanHold(imm, kXRegSizeInBits, &op) == Operand::Immediate) { 581 if (Operand::CanHold(imm, kXRegSizeInBits, &op) == Operand::Immediate) {
583 add(dest, rn, op); 582 add(dest, rn, op);
584 } else if (Operand::CanHold(-imm, kXRegSizeInBits, &op) == 583 } else if (Operand::CanHold(-imm, kXRegSizeInBits, &op) ==
585 Operand::Immediate) { 584 Operand::Immediate) {
586 sub(dest, rn, op); 585 sub(dest, rn, op);
587 } else { 586 } else {
587 // TODO(zra): Try adding top 12 bits, then bottom 12 bits.
588 ASSERT(rn != TMP2);
588 LoadImmediate(TMP2, imm, pp); 589 LoadImmediate(TMP2, imm, pp);
589 add(dest, rn, Operand(TMP2)); 590 add(dest, rn, Operand(TMP2));
590 } 591 }
591 } 592 }
592 593
593 594
595 void Assembler::AddImmediateSetFlags(
596 Register dest, Register rn, int64_t imm, Register pp) {
597 Operand op;
598 if (Operand::CanHold(imm, kXRegSizeInBits, &op) == Operand::Immediate) {
599 adds(dest, rn, op);
600 } else if (Operand::CanHold(-imm, kXRegSizeInBits, &op) ==
601 Operand::Immediate) {
602 subs(dest, rn, op);
603 } else {
604 // TODO(zra): Try adding top 12 bits, then bottom 12 bits.
605 ASSERT(rn != TMP2);
606 LoadImmediate(TMP2, imm, pp);
607 adds(dest, rn, Operand(TMP2));
608 }
609 }
610
611
612 void Assembler::AndImmediate(
613 Register rd, Register rn, int64_t imm, Register pp) {
614 Operand imm_op;
615 if (Operand::IsImmLogical(imm, kXRegSizeInBits, &imm_op)) {
616 andi(rd, rn, imm);
617 } else {
618 LoadImmediate(TMP, imm, pp);
619 and_(rd, rn, Operand(TMP));
620 }
621 }
622
623
624 void Assembler::OrImmediate(
625 Register rd, Register rn, int64_t imm, Register pp) {
626 Operand imm_op;
627 if (Operand::IsImmLogical(imm, kXRegSizeInBits, &imm_op)) {
628 orri(rd, rn, imm);
629 } else {
630 LoadImmediate(TMP, imm, pp);
631 orr(rd, rn, Operand(TMP));
632 }
633 }
634
635
636 void Assembler::XorImmediate(
637 Register rd, Register rn, int64_t imm, Register pp) {
638 Operand imm_op;
639 if (Operand::IsImmLogical(imm, kXRegSizeInBits, &imm_op)) {
640 eori(rd, rn, imm);
641 } else {
642 LoadImmediate(TMP, imm, pp);
643 eor(rd, rn, Operand(TMP));
644 }
645 }
646
647
594 void Assembler::TestImmediate(Register rn, int64_t imm, Register pp) { 648 void Assembler::TestImmediate(Register rn, int64_t imm, Register pp) {
595 Operand imm_op; 649 Operand imm_op;
596 if (Operand::IsImmLogical(imm, kXRegSizeInBits, &imm_op)) { 650 if (Operand::IsImmLogical(imm, kXRegSizeInBits, &imm_op)) {
597 tsti(rn, imm); 651 tsti(rn, imm);
598 } else { 652 } else {
599 LoadImmediate(TMP, imm, pp); 653 LoadImmediate(TMP, imm, pp);
600 tst(rn, Operand(TMP)); 654 tst(rn, Operand(TMP));
601 } 655 }
602 } 656 }
603 657
(...skipping 498 matching lines...) Expand 10 before | Expand all | Expand 10 after
1102 LoadImmediate(TMP, tags, pp); 1156 LoadImmediate(TMP, tags, pp);
1103 StoreFieldToOffset(TMP, instance_reg, Object::tags_offset()); 1157 StoreFieldToOffset(TMP, instance_reg, Object::tags_offset());
1104 } else { 1158 } else {
1105 b(failure); 1159 b(failure);
1106 } 1160 }
1107 } 1161 }
1108 1162
1109 } // namespace dart 1163 } // namespace dart
1110 1164
1111 #endif // defined TARGET_ARCH_ARM64 1165 #endif // defined TARGET_ARCH_ARM64
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