Cleanups: int -> intptr_t for "array" lengths, memory sizes.

runtime/vm/assembler_mips.cc

 // Copyright (c) 2013, the Dart project authors.  Please see the AUTHORS file
 // for details. All rights reserved. Use of this source code is governed by a
 // BSD-style license that can be found in the LICENSE file.
 
 #include "vm/globals.h"
 #if defined(TARGET_ARCH_MIPS)
 
 #include "vm/assembler.h"
 #include "vm/longjump.h"
 #include "vm/runtime_entry.h"
 #include "vm/simulator.h"
 #include "vm/stack_frame.h"
 #include "vm/stub_code.h"
 
 namespace dart {
 
 #if defined(USING_SIMULATOR)
 DECLARE_FLAG(bool, trace_sim);
 #endif
 DEFINE_FLAG(bool, print_stop_message, false, "Print stop message.");
 DECLARE_FLAG(bool, inline_alloc);
 
-void Assembler::InitializeMemoryWithBreakpoints(uword data, int length) {
+void Assembler::InitializeMemoryWithBreakpoints(uword data, intptr_t length) {
   ASSERT(Utils::IsAligned(data, 4));
   ASSERT(Utils::IsAligned(length, 4));
   const uword end = data + length;
   while (data < end) {
     *reinterpret_cast<int32_t*>(data) = Instr::kBreakPointInstruction;
     data += 4;
   }
 }
 
 
@@ skipping 22 matching lines @@
         1, Object::branch_offset_error());
   }
 
   // Properly preserve only the bits supported in the instruction.
   offset >>= 2;
   offset &= kBranchOffsetMask;
   return (instr & ~kBranchOffsetMask) | offset;
 }
 
 
-static int DecodeBranchOffset(int32_t instr) {
+static intptr_t DecodeBranchOffset(int32_t instr) {
   // Sign-extend, left-shift by 2.
   return (((instr & kBranchOffsetMask) << 16) >> 14);
 }
 
 
 static int32_t DecodeLoadImmediate(int32_t ori_instr, int32_t lui_instr) {
   return (((lui_instr & kBranchOffsetMask) << 16) |
            (ori_instr & kBranchOffsetMask));
 }
 
 
 static int32_t EncodeLoadImmediate(int32_t dest, int32_t instr) {
   return ((instr & ~kBranchOffsetMask) | (dest & kBranchOffsetMask));
 }
 
 
 class PatchFarJump : public AssemblerFixup {
  public:
   PatchFarJump() {}
 
-  void Process(const MemoryRegion& region, int position) {
+  void Process(const MemoryRegion& region, intptr_t position) {
     const int32_t high = region.Load<int32_t>(position);
     const int32_t low = region.Load<int32_t>(position + Instr::kInstrSize);
     const int32_t offset = DecodeLoadImmediate(low, high);
     const int32_t dest = region.start() + offset;
 
     if ((Instr::At(reinterpret_cast<uword>(&high))->OpcodeField() == LUI) &&
         (Instr::At(reinterpret_cast<uword>(&low))->OpcodeField() == ORI)) {
       // Change the offset to the absolute value.
       const int32_t encoded_low =
           EncodeLoadImmediate(dest & kBranchOffsetMask, low);
@@ skipping 86 matching lines @@
     // Relative destination from an instruction after the branch.
     const int32_t dest =
         label->Position() - (buffer_.Size() + Instr::kInstrSize);
     if (use_far_branches() && !CanEncodeBranchOffset(dest)) {
       EmitFarBranch(b, rs, rt, label->Position());
     } else {
       const uint16_t dest_off = EncodeBranchOffset(dest, 0);
       EmitIType(b, rs, rt, dest_off);
     }
   } else {
-    const int position = buffer_.Size();
+    const intptr_t position = buffer_.Size();
     if (use_far_branches()) {
       const uint32_t dest_off = label->position_;
       EmitFarBranch(b, rs, rt, dest_off);
     } else {
       const uint16_t dest_off = EncodeBranchOffset(label->position_, 0);
       EmitIType(b, rs, rt, dest_off);
     }
     label->LinkTo(position);
   }
 }
 
 
 void Assembler::EmitRegImmBranch(RtRegImm b, Register rs, Label* label) {
   if (label->IsBound()) {
     // Relative destination from an instruction after the branch.
     const int32_t dest =
         label->Position() - (buffer_.Size() + Instr::kInstrSize);
     if (use_far_branches() && !CanEncodeBranchOffset(dest)) {
       EmitFarRegImmBranch(b, rs, label->Position());
     } else {
       const uint16_t dest_off = EncodeBranchOffset(dest, 0);
       EmitRegImmType(REGIMM, rs, b, dest_off);
     }
   } else {
-    const int position = buffer_.Size();
+    const intptr_t position = buffer_.Size();
     if (use_far_branches()) {
       const uint32_t dest_off = label->position_;
       EmitFarRegImmBranch(b, rs, dest_off);
     } else {
       const uint16_t dest_off = EncodeBranchOffset(label->position_, 0);
       EmitRegImmType(REGIMM, rs, b, dest_off);
     }
     label->LinkTo(position);
   }
 }
 
 
 void Assembler::EmitFpuBranch(bool kind, Label *label) {
   const int32_t b16 = kind ? (1 << 16) : 0;  // Bit 16 set for branch on true.
   if (label->IsBound()) {
     // Relative destination from an instruction after the branch.
     const int32_t dest =
         label->Position() - (buffer_.Size() + Instr::kInstrSize);
     if (use_far_branches() && !CanEncodeBranchOffset(dest)) {
       EmitFarFpuBranch(kind, label->Position());
     } else {
       const uint16_t dest_off = EncodeBranchOffset(dest, 0);
       Emit(COP1 << kOpcodeShift |
            COP1_BC << kCop1SubShift |
            b16 |
            dest_off);
     }
   } else {
-    const int position = buffer_.Size();
+    const intptr_t position = buffer_.Size();
     if (use_far_branches()) {
       const uint32_t dest_off = label->position_;
       EmitFarFpuBranch(kind, dest_off);
     } else {
       const uint16_t dest_off = EncodeBranchOffset(label->position_, 0);
       Emit(COP1 << kOpcodeShift |
            COP1_BC << kCop1SubShift |
            b16 |
            dest_off);
     }
@@ skipping 12 matching lines @@
     return instr ^ (1 << 16);
   }
   Opcode b = OppositeBranchOpcode(i->OpcodeField());
   i->SetOpcodeField(b);
   return i->InstructionBits();
 }
 
 
 void Assembler::Bind(Label* label) {
   ASSERT(!label->IsBound());
-  int bound_pc = buffer_.Size();
+  intptr_t bound_pc = buffer_.Size();
 
   while (label->IsLinked()) {
     int32_t position = label->Position();
     int32_t dest = bound_pc - (position + Instr::kInstrSize);
 
     if (use_far_branches() && !CanEncodeBranchOffset(dest)) {
       // Far branches are enabled and we can't encode the branch offset.
 
       // Grab the branch instruction. We'll need to flip it later.
       const int32_t branch = buffer_.Load<int32_t>(position);
@@ skipping 173 matching lines @@
 
 
 int32_t Assembler::AddObject(const Object& obj) {
   ASSERT(obj.IsNotTemporaryScopedHandle());
   ASSERT(obj.IsOld());
   if (object_pool_.IsNull()) {
     // The object pool cannot be used in the vm isolate.
     ASSERT(Isolate::Current() != Dart::vm_isolate());
     object_pool_ = GrowableObjectArray::New(Heap::kOld);
   }
-  for (int i = 0; i < object_pool_.Length(); i++) {
+  for (intptr_t i = 0; i < object_pool_.Length(); i++) {
     if (object_pool_.At(i) == obj.raw()) {
       return i;
     }
   }
   object_pool_.Add(obj, Heap::kOld);
   return object_pool_.Length() - 1;
 }
 
 
 void Assembler::PushObject(const Object& object) {
@@ skipping 492 matching lines @@
     Bind(&msg);
     break_(Instr::kMsgMessageCode);
   }
 #endif
 }
 
 }  // namespace dart
 
 #endif  // defined TARGET_ARCH_MIPS