add Intel Code Analyst markers

source/row_gcc.cc

Index: source/row_gcc.cc
diff --git a/source/row_gcc.cc b/source/row_gcc.cc
index dccf0135b1ccbb01e7536d4491f8df8eb1935726..0e759cac2499a995dfd4c1347a6189094bcec0eb 100644
--- a/source/row_gcc.cc
+++ b/source/row_gcc.cc
@@ -2462,6 +2462,7 @@ void MirrorRow_AVX2(const uint8* src, uint8* dst, int width) {
   asm volatile (
     "vbroadcastf128 %3,%%ymm5                  \n"
     LABELALIGN
+    IACA_ASM_START

[fbarchard1, 2017/01/13 02:14:43]

this is an example of usage.  will be removed before checkin

   "1:                                          \n"
     MEMOPREG(vmovdqu,-0x20,0,2,1,ymm0)         //  vmovdqu -0x20(%0,%2),%%ymm0
     "vpshufb    %%ymm5,%%ymm0,%%ymm0           \n"
@@ -2470,6 +2471,7 @@ void MirrorRow_AVX2(const uint8* src, uint8* dst, int width) {
     "lea       " MEMLEA(0x20,1) ",%1           \n"
     "sub       $0x20,%2                        \n"
     "jg        1b                              \n"
+    IACA_ASM_END
     "vzeroupper                                \n"
   : "+r"(src),  // %0
     "+r"(dst),  // %1
@@ -2650,6 +2652,7 @@ void MergeUVRow_AVX2(const uint8* src_u,
   asm volatile (
     "sub       %0,%1                             \n"
     LABELALIGN
+    IACA_ASM_START
   "1:                                          \n"
     "vmovdqu   " MEMACCESS(0) ",%%ymm0           \n"
     MEMOPREG(vmovdqu,0x00,0,1,1,ymm1)             //  vmovdqu (%0,%1,1),%%ymm1
@@ -2663,6 +2666,7 @@ void MergeUVRow_AVX2(const uint8* src_u,
     "lea       " MEMLEA(0x40,2) ",%2             \n"
     "sub       $0x20,%3                          \n"
     "jg        1b                                \n"
+    IACA_ASM_END
     "vzeroupper                                  \n"
   : "+r"(src_u),     // %0
     "+r"(src_v),     // %1