add Intel Code Analyst markers

source/row_gcc.cc

Index: source/row_gcc.cc
diff --git a/source/row_gcc.cc b/source/row_gcc.cc
index dccf0135b1ccbb01e7536d4491f8df8eb1935726..4f6bd8dde8eec15c884428bfe0a6cbd89caca634 100644
--- a/source/row_gcc.cc
+++ b/source/row_gcc.cc
@@ -2112,6 +2112,7 @@ void OMITFP I422ToARGBRow_AVX2(const uint8* y_buf,
     STOREARGB_AVX2
     "sub       $0x10,%[width]                  \n"
     "jg        1b                              \n"
+
     "vzeroupper                                \n"
   : [y_buf]"+r"(y_buf),    // %[y_buf]
     [u_buf]"+r"(u_buf),    // %[u_buf]
@@ -5458,7 +5459,7 @@ void HalfFloatRow_AVX2(const uint16* src, uint16* dst, float scale, int width) {
 }
 #endif  // HAS_HALFFLOATROW_AVX2
 
-#ifdef HAS_HALFFLOATROW_F16C
+//#ifdef HAS_HALFFLOATROW_F16C
 void HalfFloatRow_F16C(const uint16* src, uint16* dst, float scale, int width) {
   asm volatile (
    "vbroadcastss  %3, %%ymm4                  \n"
@@ -5490,7 +5491,7 @@ void HalfFloatRow_F16C(const uint16* src, uint16* dst, float scale, int width) {
     "xmm2", "xmm3", "xmm4"
   );
 }
-#endif  // HAS_HALFFLOATROW_F16C
+//#endif  // HAS_HALFFLOATROW_F16C
 
 #ifdef HAS_HALFFLOATROW_F16C
 void HalfFloat1Row_F16C(const uint16* src, uint16* dst, float, int width) {