add Intel Code Analyst markers

source/row_gcc.cc

 // VERSION 2
 /*
  *  Copyright 2011 The LibYuv Project Authors. All rights reserved.
  *
  *  Use of this source code is governed by a BSD-style license
  *  that can be found in the LICENSE file in the root of the source
  *  tree. An additional intellectual property rights grant can be found
  *  in the file PATENTS. All contributing project authors may
  *  be found in the AUTHORS file in the root of the source tree.
  */
@@ skipping 2444 matching lines @@
   );
 }
 #endif  // HAS_MIRRORROW_SSSE3
 
 #ifdef HAS_MIRRORROW_AVX2
 void MirrorRow_AVX2(const uint8* src, uint8* dst, int width) {
   intptr_t temp_width = (intptr_t)(width);
   asm volatile (
     "vbroadcastf128 %3,%%ymm5                  \n"
     LABELALIGN
+    IACA_ASM_START

[fbarchard1, 2017/01/13 02:14:43]

this is an example of usage.  will be removed before checkin

   "1:                                          \n"
     MEMOPREG(vmovdqu,-0x20,0,2,1,ymm0)         //  vmovdqu -0x20(%0,%2),%%ymm0
     "vpshufb    %%ymm5,%%ymm0,%%ymm0           \n"
     "vpermq     $0x4e,%%ymm0,%%ymm0            \n"
     "vmovdqu    %%ymm0," MEMACCESS(1) "        \n"
     "lea       " MEMLEA(0x20,1) ",%1           \n"
     "sub       $0x20,%2                        \n"
     "jg        1b                              \n"
+    IACA_ASM_END
     "vzeroupper                                \n"
   : "+r"(src),  // %0
     "+r"(dst),  // %1
     "+r"(temp_width)  // %2
   : "m"(kShuffleMirror) // %3
   : "memory", "cc", NACL_R14
     "xmm0", "xmm5"
   );
 }
 #endif  // HAS_MIRRORROW_AVX2
@@ skipping 160 matching lines @@
 #endif  // HAS_SPLITUVROW_SSE2
 
 #ifdef HAS_MERGEUVROW_AVX2
 void MergeUVRow_AVX2(const uint8* src_u,
                      const uint8* src_v,
                      uint8* dst_uv,
                      int width) {
   asm volatile (
     "sub       %0,%1                             \n"
     LABELALIGN
+    IACA_ASM_START
   "1:                                          \n"
     "vmovdqu   " MEMACCESS(0) ",%%ymm0           \n"
     MEMOPREG(vmovdqu,0x00,0,1,1,ymm1)             //  vmovdqu (%0,%1,1),%%ymm1
     "lea       " MEMLEA(0x20,0) ",%0             \n"
     "vpunpcklbw %%ymm1,%%ymm0,%%ymm2             \n"
     "vpunpckhbw %%ymm1,%%ymm0,%%ymm0             \n"
     "vextractf128 $0x0,%%ymm2," MEMACCESS(2) "   \n"
     "vextractf128 $0x0,%%ymm0," MEMACCESS2(0x10,2) "\n"
     "vextractf128 $0x1,%%ymm2," MEMACCESS2(0x20,2) "\n"
     "vextractf128 $0x1,%%ymm0," MEMACCESS2(0x30,2) "\n"
     "lea       " MEMLEA(0x40,2) ",%2             \n"
     "sub       $0x20,%3                          \n"
     "jg        1b                                \n"
+    IACA_ASM_END
     "vzeroupper                                  \n"
   : "+r"(src_u),     // %0
     "+r"(src_v),     // %1
     "+r"(dst_uv),    // %2
     "+r"(width)      // %3
   :
   : "memory", "cc", NACL_R14
     "xmm0", "xmm1", "xmm2"
   );
 }
@@ skipping 3008 matching lines @@
   );
 }
 #endif  // HAS_ARGBLUMACOLORTABLEROW_SSSE3
 
 #endif  // defined(__x86_64__) || defined(__i386__)
 
 #ifdef __cplusplus
 }  // extern "C"
 }  // namespace libyuv
 #endif