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1 // Copyright (c) 1994-2006 Sun Microsystems Inc. | 1 // Copyright (c) 1994-2006 Sun Microsystems Inc. |
2 // All Rights Reserved. | 2 // All Rights Reserved. |
3 // | 3 // |
4 // Redistribution and use in source and binary forms, with or without | 4 // Redistribution and use in source and binary forms, with or without |
5 // modification, are permitted provided that the following conditions | 5 // modification, are permitted provided that the following conditions |
6 // are met: | 6 // are met: |
7 // | 7 // |
8 // - Redistributions of source code must retain the above copyright notice, | 8 // - Redistributions of source code must retain the above copyright notice, |
9 // this list of conditions and the following disclaimer. | 9 // this list of conditions and the following disclaimer. |
10 // | 10 // |
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830 void mullw(Register dst, Register src1, Register src2, OEBit o = LeaveOE, | 830 void mullw(Register dst, Register src1, Register src2, OEBit o = LeaveOE, |
831 RCBit r = LeaveRC); | 831 RCBit r = LeaveRC); |
832 | 832 |
833 void mulhw(Register dst, Register src1, Register src2, RCBit r = LeaveRC); | 833 void mulhw(Register dst, Register src1, Register src2, RCBit r = LeaveRC); |
834 void mulhwu(Register dst, Register src1, Register src2, RCBit r = LeaveRC); | 834 void mulhwu(Register dst, Register src1, Register src2, RCBit r = LeaveRC); |
835 | 835 |
836 void divw(Register dst, Register src1, Register src2, OEBit o = LeaveOE, | 836 void divw(Register dst, Register src1, Register src2, OEBit o = LeaveOE, |
837 RCBit r = LeaveRC); | 837 RCBit r = LeaveRC); |
838 void divwu(Register dst, Register src1, Register src2, OEBit o = LeaveOE, | 838 void divwu(Register dst, Register src1, Register src2, OEBit o = LeaveOE, |
839 RCBit r = LeaveRC); | 839 RCBit r = LeaveRC); |
| 840 void modsw(Register rt, Register ra, Register rb); |
| 841 void moduw(Register rt, Register ra, Register rb); |
840 | 842 |
841 void addi(Register dst, Register src, const Operand& imm); | 843 void addi(Register dst, Register src, const Operand& imm); |
842 void addis(Register dst, Register src, const Operand& imm); | 844 void addis(Register dst, Register src, const Operand& imm); |
843 void addic(Register dst, Register src, const Operand& imm); | 845 void addic(Register dst, Register src, const Operand& imm); |
844 | 846 |
845 void and_(Register dst, Register src1, Register src2, RCBit rc = LeaveRC); | 847 void and_(Register dst, Register src1, Register src2, RCBit rc = LeaveRC); |
846 void andc(Register dst, Register src1, Register src2, RCBit rc = LeaveRC); | 848 void andc(Register dst, Register src1, Register src2, RCBit rc = LeaveRC); |
847 void andi(Register ra, Register rs, const Operand& imm); | 849 void andi(Register ra, Register rs, const Operand& imm); |
848 void andis(Register ra, Register rs, const Operand& imm); | 850 void andis(Register ra, Register rs, const Operand& imm); |
849 void nor(Register dst, Register src1, Register src2, RCBit r = LeaveRC); | 851 void nor(Register dst, Register src1, Register src2, RCBit r = LeaveRC); |
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925 void rotldi(Register ra, Register rs, int sh, RCBit r = LeaveRC); | 927 void rotldi(Register ra, Register rs, int sh, RCBit r = LeaveRC); |
926 void rotrdi(Register ra, Register rs, int sh, RCBit r = LeaveRC); | 928 void rotrdi(Register ra, Register rs, int sh, RCBit r = LeaveRC); |
927 void cntlzd_(Register dst, Register src, RCBit rc = LeaveRC); | 929 void cntlzd_(Register dst, Register src, RCBit rc = LeaveRC); |
928 void popcntd(Register dst, Register src); | 930 void popcntd(Register dst, Register src); |
929 void mulld(Register dst, Register src1, Register src2, OEBit o = LeaveOE, | 931 void mulld(Register dst, Register src1, Register src2, OEBit o = LeaveOE, |
930 RCBit r = LeaveRC); | 932 RCBit r = LeaveRC); |
931 void divd(Register dst, Register src1, Register src2, OEBit o = LeaveOE, | 933 void divd(Register dst, Register src1, Register src2, OEBit o = LeaveOE, |
932 RCBit r = LeaveRC); | 934 RCBit r = LeaveRC); |
933 void divdu(Register dst, Register src1, Register src2, OEBit o = LeaveOE, | 935 void divdu(Register dst, Register src1, Register src2, OEBit o = LeaveOE, |
934 RCBit r = LeaveRC); | 936 RCBit r = LeaveRC); |
| 937 void modsd(Register rt, Register ra, Register rb); |
| 938 void modud(Register rt, Register ra, Register rb); |
935 #endif | 939 #endif |
936 | 940 |
937 void rlwinm(Register ra, Register rs, int sh, int mb, int me, | 941 void rlwinm(Register ra, Register rs, int sh, int mb, int me, |
938 RCBit rc = LeaveRC); | 942 RCBit rc = LeaveRC); |
939 void rlwimi(Register ra, Register rs, int sh, int mb, int me, | 943 void rlwimi(Register ra, Register rs, int sh, int mb, int me, |
940 RCBit rc = LeaveRC); | 944 RCBit rc = LeaveRC); |
941 void rlwnm(Register ra, Register rs, Register rb, int mb, int me, | 945 void rlwnm(Register ra, Register rs, Register rb, int mb, int me, |
942 RCBit rc = LeaveRC); | 946 RCBit rc = LeaveRC); |
943 void slwi(Register dst, Register src, const Operand& val, RCBit rc = LeaveRC); | 947 void slwi(Register dst, Register src, const Operand& val, RCBit rc = LeaveRC); |
944 void srwi(Register dst, Register src, const Operand& val, RCBit rc = LeaveRC); | 948 void srwi(Register dst, Register src, const Operand& val, RCBit rc = LeaveRC); |
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1486 | 1490 |
1487 | 1491 |
1488 class EnsureSpace BASE_EMBEDDED { | 1492 class EnsureSpace BASE_EMBEDDED { |
1489 public: | 1493 public: |
1490 explicit EnsureSpace(Assembler* assembler) { assembler->CheckBuffer(); } | 1494 explicit EnsureSpace(Assembler* assembler) { assembler->CheckBuffer(); } |
1491 }; | 1495 }; |
1492 } // namespace internal | 1496 } // namespace internal |
1493 } // namespace v8 | 1497 } // namespace v8 |
1494 | 1498 |
1495 #endif // V8_PPC_ASSEMBLER_PPC_H_ | 1499 #endif // V8_PPC_ASSEMBLER_PPC_H_ |
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