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Unified Diff: src/compiler/ia32/instruction-selector-ia32.cc

Issue 2623633003: [Atomics] Make Atomics.exchange a builtin using TF (Closed)
Patch Set: remove headers Created 3 years, 10 months ago
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Index: src/compiler/ia32/instruction-selector-ia32.cc
diff --git a/src/compiler/ia32/instruction-selector-ia32.cc b/src/compiler/ia32/instruction-selector-ia32.cc
index a5f72c70b230320108f454b9fd62fa654d51467f..fcb0b484faa181c17e2d912ff78e74a692496ccc 100644
--- a/src/compiler/ia32/instruction-selector-ia32.cc
+++ b/src/compiler/ia32/instruction-selector-ia32.cc
@@ -1688,13 +1688,13 @@ void InstructionSelector::VisitAtomicStore(Node* node) {
ArchOpcode opcode = kArchNop;
switch (rep) {
case MachineRepresentation::kWord8:
- opcode = kIA32Xchgb;
+ opcode = kAtomicExchangeInt8;
break;
case MachineRepresentation::kWord16:
- opcode = kIA32Xchgw;
+ opcode = kAtomicExchangeInt16;
break;
case MachineRepresentation::kWord32:
- opcode = kIA32Xchgl;
+ opcode = kAtomicExchangeWord32;
break;
default:
UNREACHABLE();
@@ -1703,6 +1703,7 @@ void InstructionSelector::VisitAtomicStore(Node* node) {
AddressingMode addressing_mode;
InstructionOperand inputs[4];
size_t input_count = 0;
+ inputs[input_count++] = g.UseUniqueRegister(value);
inputs[input_count++] = g.UseUniqueRegister(base);
if (g.CanBeImmediate(index)) {
inputs[input_count++] = g.UseImmediate(index);
@@ -1711,11 +1712,50 @@ void InstructionSelector::VisitAtomicStore(Node* node) {
inputs[input_count++] = g.UseUniqueRegister(index);
addressing_mode = kMode_MR1;
}
- inputs[input_count++] = g.UseUniqueRegister(value);
InstructionCode code = opcode | AddressingModeField::encode(addressing_mode);
Emit(code, 0, nullptr, input_count, inputs);
}
+void InstructionSelector::VisitAtomicExchange(Node* node) {
+ IA32OperandGenerator g(this);
+ Node* base = node->InputAt(0);
+ Node* index = node->InputAt(1);
+ Node* value = node->InputAt(2);
+
+ MachineType type = AtomicExchangeRepresentationOf(node->op());
+ ArchOpcode opcode = kArchNop;
+ if (type == MachineType::Int8()) {
+ opcode = kAtomicExchangeInt8;
+ } else if (type == MachineType::Uint8()) {
+ opcode = kAtomicExchangeUint8;
+ } else if (type == MachineType::Int16()) {
+ opcode = kAtomicExchangeInt16;
+ } else if (type == MachineType::Uint16()) {
+ opcode = kAtomicExchangeUint16;
+ } else if (type == MachineType::Int32() || type == MachineType::Uint32()) {
+ opcode = kAtomicExchangeWord32;
+ } else {
+ UNREACHABLE();
+ return;
+ }
+ InstructionOperand outputs[1];
+ AddressingMode addressing_mode;
+ InstructionOperand inputs[4];
+ size_t input_count = 0;
+ inputs[input_count++] = g.UseUniqueRegister(value);
+ inputs[input_count++] = g.UseUniqueRegister(base);
+ if (g.CanBeImmediate(index)) {
+ inputs[input_count++] = g.UseImmediate(index);
+ addressing_mode = kMode_MRI;
+ } else {
+ inputs[input_count++] = g.UseUniqueRegister(index);
+ addressing_mode = kMode_MR1;
+ }
+ outputs[0] = g.DefineSameAsFirst(node);
+ InstructionCode code = opcode | AddressingModeField::encode(addressing_mode);
+ Emit(code, 1, outputs, input_count, inputs);
+}
+
// static
MachineOperatorBuilder::Flags
InstructionSelector::SupportedMachineOperatorFlags() {

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