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Side by Side Diff: src/compiler/machine-operator.cc

Issue 2623633003: [Atomics] Make Atomics.exchange a builtin using TF (Closed)
Patch Set: remove 0 extend for arm Created 3 years, 9 months ago
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1 // Copyright 2014 the V8 project authors. All rights reserved. 1 // Copyright 2014 the V8 project authors. All rights reserved.
2 // Use of this source code is governed by a BSD-style license that can be 2 // Use of this source code is governed by a BSD-style license that can be
3 // found in the LICENSE file. 3 // found in the LICENSE file.
4 4
5 #include "src/compiler/machine-operator.h" 5 #include "src/compiler/machine-operator.h"
6 6
7 #include "src/base/lazy-instance.h" 7 #include "src/base/lazy-instance.h"
8 #include "src/compiler/opcodes.h" 8 #include "src/compiler/opcodes.h"
9 #include "src/compiler/operator.h" 9 #include "src/compiler/operator.h"
10 10
(...skipping 62 matching lines...) Expand 10 before | Expand all | Expand 10 after
73 int StackSlotSizeOf(Operator const* op) { 73 int StackSlotSizeOf(Operator const* op) {
74 DCHECK_EQ(IrOpcode::kStackSlot, op->opcode()); 74 DCHECK_EQ(IrOpcode::kStackSlot, op->opcode());
75 return OpParameter<int>(op); 75 return OpParameter<int>(op);
76 } 76 }
77 77
78 MachineRepresentation AtomicStoreRepresentationOf(Operator const* op) { 78 MachineRepresentation AtomicStoreRepresentationOf(Operator const* op) {
79 DCHECK_EQ(IrOpcode::kAtomicStore, op->opcode()); 79 DCHECK_EQ(IrOpcode::kAtomicStore, op->opcode());
80 return OpParameter<MachineRepresentation>(op); 80 return OpParameter<MachineRepresentation>(op);
81 } 81 }
82 82
83 MachineType AtomicExchangeRepresentationOf(Operator const* op) {
84 DCHECK_EQ(IrOpcode::kAtomicExchange, op->opcode());
85 return OpParameter<MachineType>(op);
86 }
87
83 #define PURE_BINARY_OP_LIST_32(V) \ 88 #define PURE_BINARY_OP_LIST_32(V) \
84 V(Word32And, Operator::kAssociative | Operator::kCommutative, 2, 0, 1) \ 89 V(Word32And, Operator::kAssociative | Operator::kCommutative, 2, 0, 1) \
85 V(Word32Or, Operator::kAssociative | Operator::kCommutative, 2, 0, 1) \ 90 V(Word32Or, Operator::kAssociative | Operator::kCommutative, 2, 0, 1) \
86 V(Word32Xor, Operator::kAssociative | Operator::kCommutative, 2, 0, 1) \ 91 V(Word32Xor, Operator::kAssociative | Operator::kCommutative, 2, 0, 1) \
87 V(Word32Shl, Operator::kNoProperties, 2, 0, 1) \ 92 V(Word32Shl, Operator::kNoProperties, 2, 0, 1) \
88 V(Word32Shr, Operator::kNoProperties, 2, 0, 1) \ 93 V(Word32Shr, Operator::kNoProperties, 2, 0, 1) \
89 V(Word32Sar, Operator::kNoProperties, 2, 0, 1) \ 94 V(Word32Sar, Operator::kNoProperties, 2, 0, 1) \
90 V(Word32Ror, Operator::kNoProperties, 2, 0, 1) \ 95 V(Word32Ror, Operator::kNoProperties, 2, 0, 1) \
91 V(Word32Equal, Operator::kCommutative, 2, 0, 1) \ 96 V(Word32Equal, Operator::kCommutative, 2, 0, 1) \
92 V(Int32Add, Operator::kAssociative | Operator::kCommutative, 2, 0, 1) \ 97 V(Int32Add, Operator::kAssociative | Operator::kCommutative, 2, 0, 1) \
(...skipping 502 matching lines...) Expand 10 before | Expand all | Expand 10 after
595 AtomicStore##Type##Operator() \ 600 AtomicStore##Type##Operator() \
596 : Operator1<MachineRepresentation>( \ 601 : Operator1<MachineRepresentation>( \
597 IrOpcode::kAtomicStore, \ 602 IrOpcode::kAtomicStore, \
598 Operator::kNoDeopt | Operator::kNoRead | Operator::kNoThrow, \ 603 Operator::kNoDeopt | Operator::kNoRead | Operator::kNoThrow, \
599 "AtomicStore", 3, 1, 1, 0, 1, 0, MachineRepresentation::Type) {} \ 604 "AtomicStore", 3, 1, 1, 0, 1, 0, MachineRepresentation::Type) {} \
600 }; \ 605 }; \
601 AtomicStore##Type##Operator kAtomicStore##Type; 606 AtomicStore##Type##Operator kAtomicStore##Type;
602 ATOMIC_REPRESENTATION_LIST(ATOMIC_STORE) 607 ATOMIC_REPRESENTATION_LIST(ATOMIC_STORE)
603 #undef STORE 608 #undef STORE
604 609
610 #define ATOMIC_EXCHANGE(Type) \
611 struct AtomicExchange##Type##Operator : public Operator1<MachineType> { \
612 AtomicExchange##Type##Operator() \
613 : Operator1<MachineType>(IrOpcode::kAtomicExchange, \
614 Operator::kNoDeopt | Operator::kNoThrow, \
615 "AtomicExchange", 3, 1, 1, 1, 1, 0, \
616 MachineType::Type()) {} \
617 }; \
618 AtomicExchange##Type##Operator kAtomicExchange##Type;
619 ATOMIC_TYPE_LIST(ATOMIC_EXCHANGE)
620 #undef ATOMIC_EXCHANGE
621
605 struct DebugBreakOperator : public Operator { 622 struct DebugBreakOperator : public Operator {
606 DebugBreakOperator() 623 DebugBreakOperator()
607 : Operator(IrOpcode::kDebugBreak, Operator::kNoThrow, "DebugBreak", 0, 624 : Operator(IrOpcode::kDebugBreak, Operator::kNoThrow, "DebugBreak", 0,
608 0, 0, 0, 0, 0) {} 625 0, 0, 0, 0, 0) {}
609 }; 626 };
610 DebugBreakOperator kDebugBreak; 627 DebugBreakOperator kDebugBreak;
611 628
612 struct UnsafePointerAddOperator final : public Operator { 629 struct UnsafePointerAddOperator final : public Operator {
613 UnsafePointerAddOperator() 630 UnsafePointerAddOperator()
614 : Operator(IrOpcode::kUnsafePointerAdd, Operator::kKontrol, 631 : Operator(IrOpcode::kUnsafePointerAdd, Operator::kKontrol,
(...skipping 219 matching lines...) Expand 10 before | Expand all | Expand 10 after
834 #define STORE(kRep) \ 851 #define STORE(kRep) \
835 if (rep == MachineRepresentation::kRep) { \ 852 if (rep == MachineRepresentation::kRep) { \
836 return &cache_.kAtomicStore##kRep; \ 853 return &cache_.kAtomicStore##kRep; \
837 } 854 }
838 ATOMIC_REPRESENTATION_LIST(STORE) 855 ATOMIC_REPRESENTATION_LIST(STORE)
839 #undef STORE 856 #undef STORE
840 UNREACHABLE(); 857 UNREACHABLE();
841 return nullptr; 858 return nullptr;
842 } 859 }
843 860
861 const Operator* MachineOperatorBuilder::AtomicExchange(MachineType rep) {
862 #define EXCHANGE(kRep) \
863 if (rep == MachineType::kRep()) { \
864 return &cache_.kAtomicExchange##kRep; \
865 }
866 ATOMIC_TYPE_LIST(EXCHANGE)
867 #undef EXCHANGE
868 UNREACHABLE();
869 return nullptr;
870 }
871
844 #define SIMD_LANE_OPS(Type, lane_count) \ 872 #define SIMD_LANE_OPS(Type, lane_count) \
845 const Operator* MachineOperatorBuilder::Type##ExtractLane( \ 873 const Operator* MachineOperatorBuilder::Type##ExtractLane( \
846 int32_t lane_index) { \ 874 int32_t lane_index) { \
847 DCHECK(0 <= lane_index && lane_index < lane_count); \ 875 DCHECK(0 <= lane_index && lane_index < lane_count); \
848 return new (zone_) \ 876 return new (zone_) \
849 Operator1<int32_t>(IrOpcode::k##Type##ExtractLane, Operator::kPure, \ 877 Operator1<int32_t>(IrOpcode::k##Type##ExtractLane, Operator::kPure, \
850 "Extract lane", 1, 0, 0, 1, 0, 0, lane_index); \ 878 "Extract lane", 1, 0, 0, 1, 0, 0, lane_index); \
851 } \ 879 } \
852 const Operator* MachineOperatorBuilder::Type##ReplaceLane( \ 880 const Operator* MachineOperatorBuilder::Type##ReplaceLane( \
853 int32_t lane_index) { \ 881 int32_t lane_index) { \
(...skipping 37 matching lines...) Expand 10 before | Expand all | Expand 10 after
891 return new (zone_) \ 919 return new (zone_) \
892 Operator1<uint32_t>(IrOpcode::kSimd##format##Swizzle, Operator::kPure, \ 920 Operator1<uint32_t>(IrOpcode::kSimd##format##Swizzle, Operator::kPure, \
893 "Swizzle", 2, 0, 0, 1, 0, 0, swizzle); \ 921 "Swizzle", 2, 0, 0, 1, 0, 0, swizzle); \
894 } 922 }
895 SIMD_FORMAT_LIST(SIMD_PERMUTE_OPS) 923 SIMD_FORMAT_LIST(SIMD_PERMUTE_OPS)
896 #undef SIMD_PERMUTE_OPS 924 #undef SIMD_PERMUTE_OPS
897 925
898 } // namespace compiler 926 } // namespace compiler
899 } // namespace internal 927 } // namespace internal
900 } // namespace v8 928 } // namespace v8
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