[Atomics] Make Atomics.exchange a builtin using TF

src/compiler/x64/code-generator-x64.cc

 // Copyright 2013 the V8 project authors. All rights reserved.
 // Use of this source code is governed by a BSD-style license that can be
 // found in the LICENSE file.
 
 #include "src/compiler/code-generator.h"
 
 #include <limits>
 
 #include "src/compilation-info.h"
 #include "src/compiler/code-generator-impl.h"
@@ skipping 2117 matching lines @@
       break;
     case kX64Poke: {
       int const slot = MiscField::decode(instr->opcode());
       if (HasImmediateInput(instr, 0)) {
         __ movq(Operand(rsp, slot * kPointerSize), i.InputImmediate(0));
       } else {
         __ movq(Operand(rsp, slot * kPointerSize), i.InputRegister(0));
       }
       break;
     }
-    case kX64Xchgb: {
-      size_t index = 0;
-      Operand operand = i.MemoryOperand(&index);
-      __ xchgb(i.InputRegister(index), operand);
-      break;
-    }
-    case kX64Xchgw: {
-      size_t index = 0;
-      Operand operand = i.MemoryOperand(&index);
-      __ xchgw(i.InputRegister(index), operand);
-      break;
-    }
-    case kX64Xchgl: {
-      size_t index = 0;
-      Operand operand = i.MemoryOperand(&index);
-      __ xchgl(i.InputRegister(index), operand);
-      break;
-    }
     case kX64Int32x4Create: {
       CpuFeatureScope sse_scope(masm(), SSE4_1);
       XMMRegister dst = i.OutputSimd128Register();
       __ Movd(dst, i.InputRegister(0));
       __ shufps(dst, dst, 0x0);
       break;
     }
     case kX64Int32x4ExtractLane: {
       CpuFeatureScope sse_scope(masm(), SSE4_1);
       __ Pextrd(i.OutputRegister(), i.InputSimd128Register(0), i.InputInt8(1));
@@ skipping 57 matching lines @@
       break;
     case kCheckedStoreFloat32:
       ASSEMBLE_CHECKED_STORE_FLOAT(Movss);
       break;
     case kCheckedStoreFloat64:
       ASSEMBLE_CHECKED_STORE_FLOAT(Movsd);
       break;
     case kX64StackCheck:
       __ CompareRoot(rsp, Heap::kStackLimitRootIndex);
       break;
+#define EXCHANGE_OPERANDS                \
+  size_t index = 0;                      \
+  Register r = i.InputRegister(index++); \

[binji, 2017/02/22 02:08:38]

same comment here as for ia32

[aseemgarg, 2017/02/22 03:29:02]

Done.

+  Operand operand = i.MemoryOperand(&index);
+    case kAtomicExchangeInt8: {
+      EXCHANGE_OPERANDS
+      __ xchgb(r, operand);
+      __ movsxbl(r, r);
+      break;
+    }
+    case kAtomicExchangeUint8: {
+      EXCHANGE_OPERANDS
+      __ xchgb(r, operand);
+      __ movzxbl(r, r);
+      break;
+    }
+    case kAtomicExchangeInt16: {
+      EXCHANGE_OPERANDS
+      __ xchgw(r, operand);
+      __ movsxwl(r, r);
+      break;
+    }
+    case kAtomicExchangeUint16: {
+      EXCHANGE_OPERANDS
+      __ xchgw(r, operand);
+      __ movzxwl(r, r);
+      break;
+    }
+    case kAtomicExchangeWord32: {
+      EXCHANGE_OPERANDS
+      __ xchgl(r, operand);
+      break;
+    }
+#undef EXCHANGE_OPERANDS
     case kAtomicLoadInt8:
     case kAtomicLoadUint8:
     case kAtomicLoadInt16:
     case kAtomicLoadUint16:
     case kAtomicLoadWord32:
     case kAtomicStoreWord8:
     case kAtomicStoreWord16:
     case kAtomicStoreWord32:
       UNREACHABLE();  // Won't be generated by instruction selector.
       break;
@@ skipping 617 matching lines @@
     int padding_size = last_lazy_deopt_pc_ + space_needed - current_pc;
     __ Nop(padding_size);
   }
 }
 
 #undef __
 
 }  // namespace compiler
 }  // namespace internal
 }  // namespace v8