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1 // Copyright 2014 the V8 project authors. All rights reserved. | 1 // Copyright 2014 the V8 project authors. All rights reserved. |
2 // Use of this source code is governed by a BSD-style license that can be | 2 // Use of this source code is governed by a BSD-style license that can be |
3 // found in the LICENSE file. | 3 // found in the LICENSE file. |
4 | 4 |
5 #include "src/compiler/code-generator.h" | 5 #include "src/compiler/code-generator.h" |
6 | 6 |
7 #include "src/arm64/frames-arm64.h" | 7 #include "src/arm64/frames-arm64.h" |
8 #include "src/arm64/macro-assembler-arm64.h" | 8 #include "src/arm64/macro-assembler-arm64.h" |
9 #include "src/compilation-info.h" | 9 #include "src/compilation-info.h" |
10 #include "src/compiler/code-generator-impl.h" | 10 #include "src/compiler/code-generator-impl.h" |
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92 Operand InputOperand64(size_t index) { return InputOperand(index); } | 92 Operand InputOperand64(size_t index) { return InputOperand(index); } |
93 | 93 |
94 Operand InputOperand32(size_t index) { | 94 Operand InputOperand32(size_t index) { |
95 return ToOperand32(instr_->InputAt(index)); | 95 return ToOperand32(instr_->InputAt(index)); |
96 } | 96 } |
97 | 97 |
98 Register OutputRegister64() { return OutputRegister(); } | 98 Register OutputRegister64() { return OutputRegister(); } |
99 | 99 |
100 Register OutputRegister32() { return ToRegister(instr_->Output()).W(); } | 100 Register OutputRegister32() { return ToRegister(instr_->Output()).W(); } |
101 | 101 |
102 Register TempRegister32() { return ToRegister(instr_->TempAt(0)).W(); } | |
103 | |
102 Operand InputOperand2_32(size_t index) { | 104 Operand InputOperand2_32(size_t index) { |
103 switch (AddressingModeField::decode(instr_->opcode())) { | 105 switch (AddressingModeField::decode(instr_->opcode())) { |
104 case kMode_None: | 106 case kMode_None: |
105 return InputOperand32(index); | 107 return InputOperand32(index); |
106 case kMode_Operand2_R_LSL_I: | 108 case kMode_Operand2_R_LSL_I: |
107 return Operand(InputRegister32(index), LSL, InputInt5(index + 1)); | 109 return Operand(InputRegister32(index), LSL, InputInt5(index + 1)); |
108 case kMode_Operand2_R_LSR_I: | 110 case kMode_Operand2_R_LSR_I: |
109 return Operand(InputRegister32(index), LSR, InputInt5(index + 1)); | 111 return Operand(InputRegister32(index), LSR, InputInt5(index + 1)); |
110 case kMode_Operand2_R_ASR_I: | 112 case kMode_Operand2_R_ASR_I: |
111 return Operand(InputRegister32(index), ASR, InputInt5(index + 1)); | 113 return Operand(InputRegister32(index), ASR, InputInt5(index + 1)); |
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520 } while (0) | 522 } while (0) |
521 | 523 |
522 #define ASSEMBLE_ATOMIC_STORE_INTEGER(asm_instr) \ | 524 #define ASSEMBLE_ATOMIC_STORE_INTEGER(asm_instr) \ |
523 do { \ | 525 do { \ |
524 __ Dmb(InnerShareable, BarrierAll); \ | 526 __ Dmb(InnerShareable, BarrierAll); \ |
525 __ asm_instr(i.InputRegister(2), \ | 527 __ asm_instr(i.InputRegister(2), \ |
526 MemOperand(i.InputRegister(0), i.InputRegister(1))); \ | 528 MemOperand(i.InputRegister(0), i.InputRegister(1))); \ |
527 __ Dmb(InnerShareable, BarrierAll); \ | 529 __ Dmb(InnerShareable, BarrierAll); \ |
528 } while (0) | 530 } while (0) |
529 | 531 |
532 #define ASSEMBLE_ATOMIC_EXCHANGE_INTEGER(load_instr, store_instr) \ | |
533 do { \ | |
534 Label exchange; \ | |
535 __ Dmb(InnerShareable, BarrierAll); \ | |
binji
2017/02/22 02:08:38
I don't think the barrier is required
aseemgarg
2017/02/22 03:29:02
Done.
| |
536 __ bind(&exchange); \ | |
537 __ Add(i.TempRegister(0), i.InputRegister(0), i.InputRegister(1)); \ | |
538 __ load_instr(i.OutputRegister32(), i.TempRegister(0)); \ | |
539 __ store_instr(i.TempRegister32(), i.InputRegister32(2), \ | |
540 i.TempRegister(0)); \ | |
541 __ Cmp(i.TempRegister32(), Operand(0)); \ | |
binji
2017/02/22 02:08:38
Could use Cbnz?
aseemgarg
2017/02/22 03:29:02
Done.
| |
542 __ B(ne, &exchange); \ | |
543 __ Dmb(InnerShareable, BarrierAll); \ | |
544 } while (0) | |
545 | |
530 #define ASSEMBLE_IEEE754_BINOP(name) \ | 546 #define ASSEMBLE_IEEE754_BINOP(name) \ |
531 do { \ | 547 do { \ |
532 FrameScope scope(masm(), StackFrame::MANUAL); \ | 548 FrameScope scope(masm(), StackFrame::MANUAL); \ |
533 __ CallCFunction(ExternalReference::ieee754_##name##_function(isolate()), \ | 549 __ CallCFunction(ExternalReference::ieee754_##name##_function(isolate()), \ |
534 0, 2); \ | 550 0, 2); \ |
535 } while (0) | 551 } while (0) |
536 | 552 |
537 #define ASSEMBLE_IEEE754_UNOP(name) \ | 553 #define ASSEMBLE_IEEE754_UNOP(name) \ |
538 do { \ | 554 do { \ |
539 FrameScope scope(masm(), StackFrame::MANUAL); \ | 555 FrameScope scope(masm(), StackFrame::MANUAL); \ |
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1624 break; | 1640 break; |
1625 case kAtomicStoreWord16: | 1641 case kAtomicStoreWord16: |
1626 ASSEMBLE_ATOMIC_STORE_INTEGER(Strh); | 1642 ASSEMBLE_ATOMIC_STORE_INTEGER(Strh); |
1627 break; | 1643 break; |
1628 case kAtomicStoreWord32: | 1644 case kAtomicStoreWord32: |
1629 __ Dmb(InnerShareable, BarrierAll); | 1645 __ Dmb(InnerShareable, BarrierAll); |
1630 __ Str(i.InputRegister32(2), | 1646 __ Str(i.InputRegister32(2), |
1631 MemOperand(i.InputRegister(0), i.InputRegister(1))); | 1647 MemOperand(i.InputRegister(0), i.InputRegister(1))); |
1632 __ Dmb(InnerShareable, BarrierAll); | 1648 __ Dmb(InnerShareable, BarrierAll); |
1633 break; | 1649 break; |
1650 case kAtomicExchangeInt8: | |
1651 ASSEMBLE_ATOMIC_EXCHANGE_INTEGER(ldaxrb, stlxrb); | |
1652 __ Sxtb(i.OutputRegister(0), i.OutputRegister(0)); | |
1653 break; | |
1654 case kAtomicExchangeUint8: | |
1655 ASSEMBLE_ATOMIC_EXCHANGE_INTEGER(ldaxrb, stlxrb); | |
1656 __ Uxtb(i.OutputRegister(0), i.OutputRegister(0)); | |
1657 break; | |
1658 case kAtomicExchangeInt16: | |
1659 ASSEMBLE_ATOMIC_EXCHANGE_INTEGER(ldaxrh, stlxrh); | |
1660 __ Sxth(i.OutputRegister(0), i.OutputRegister(0)); | |
1661 break; | |
1662 case kAtomicExchangeUint16: | |
1663 ASSEMBLE_ATOMIC_EXCHANGE_INTEGER(ldaxrh, stlxrh); | |
1664 __ Uxth(i.OutputRegister(0), i.OutputRegister(0)); | |
1665 break; | |
1666 case kAtomicExchangeWord32: | |
1667 ASSEMBLE_ATOMIC_EXCHANGE_INTEGER(ldaxr, stlxr); | |
1668 break; | |
1634 } | 1669 } |
1635 return kSuccess; | 1670 return kSuccess; |
1636 } // NOLINT(readability/fn_size) | 1671 } // NOLINT(readability/fn_size) |
1637 | 1672 |
1638 | 1673 |
1639 // Assemble branches after this instruction. | 1674 // Assemble branches after this instruction. |
1640 void CodeGenerator::AssembleArchBranch(Instruction* instr, BranchInfo* branch) { | 1675 void CodeGenerator::AssembleArchBranch(Instruction* instr, BranchInfo* branch) { |
1641 Arm64OperandConverter i(this, instr); | 1676 Arm64OperandConverter i(this, instr); |
1642 Label* tlabel = branch->true_label; | 1677 Label* tlabel = branch->true_label; |
1643 Label* flabel = branch->false_label; | 1678 Label* flabel = branch->false_label; |
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2177 padding_size -= kInstructionSize; | 2212 padding_size -= kInstructionSize; |
2178 } | 2213 } |
2179 } | 2214 } |
2180 } | 2215 } |
2181 | 2216 |
2182 #undef __ | 2217 #undef __ |
2183 | 2218 |
2184 } // namespace compiler | 2219 } // namespace compiler |
2185 } // namespace internal | 2220 } // namespace internal |
2186 } // namespace v8 | 2221 } // namespace v8 |
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