OLD | NEW |
1 ; Test encoding of MIPS32 floating point comparison | 1 ; Test encoding of MIPS32 floating point comparison |
2 | 2 |
3 ; REQUIRES: allow_dump | 3 ; REQUIRES: allow_dump |
4 | 4 |
5 ; Compile using standalone assembler. | 5 ; Compile using standalone assembler. |
6 ; RUN: %p2i --filetype=asm -i %s --target=mips32 --args -O2 \ | 6 ; RUN: %p2i --filetype=asm -i %s --target=mips32 --args -O2 \ |
7 ; RUN: --allow-externally-defined-symbols \ | 7 ; RUN: --allow-externally-defined-symbols \ |
8 ; RUN: | FileCheck %s --check-prefix=ASM | 8 ; RUN: | FileCheck %s --check-prefix=ASM |
9 | 9 |
10 ; Show bytes in assembled standalone code. | 10 ; Show bytes in assembled standalone code. |
(...skipping 13 matching lines...) Expand all Loading... |
24 | 24 |
25 define internal i32 @fcmpFalseFloat(float %a, float %b) { | 25 define internal i32 @fcmpFalseFloat(float %a, float %b) { |
26 entry: | 26 entry: |
27 %cmp = fcmp false float %a, %b | 27 %cmp = fcmp false float %a, %b |
28 %cmp.ret_ext = zext i1 %cmp to i32 | 28 %cmp.ret_ext = zext i1 %cmp to i32 |
29 ret i32 %cmp.ret_ext | 29 ret i32 %cmp.ret_ext |
30 } | 30 } |
31 | 31 |
32 ; ASM-LABEL: fcmpFalseFloat: | 32 ; ASM-LABEL: fcmpFalseFloat: |
33 ; ASM-NEXT: .LfcmpFalseFloat$entry: | 33 ; ASM-NEXT: .LfcmpFalseFloat$entry: |
34 ; ASM-NEXT: » addiu» $v0, $zero, 0 | 34 ; ASM: »addiu» $v0, $zero, 0 |
35 ; ASM-NEXT: andi $v0, $v0, 1 | 35 ; ASM-NEXT: andi $v0, $v0, 1 |
36 ; ASM-NEXT: jr $ra | 36 ; ASM-NEXT: jr $ra |
37 | 37 |
38 ; DIS-LABEL: 00000000 <fcmpFalseFloat>: | 38 ; DIS-LABEL: 00000000 <fcmpFalseFloat>: |
39 ; DIS-NEXT: 0: 24020000 li v0,0 | 39 ; DIS-NEXT: 0: 24020000 li v0,0 |
40 ; DIS-NEXT: 4: 30420001 andi v0,v0,0x1 | 40 ; DIS-NEXT: 4: 30420001 andi v0,v0,0x1 |
41 ; DIS-NEXT: 8: 03e00008 jr ra | 41 ; DIS-NEXT: 8: 03e00008 jr ra |
42 | 42 |
43 ; IASM-LABEL: fcmpFalseFloat: | 43 ; IASM-LABEL: fcmpFalseFloat: |
44 ; IASM-NEXT: .LfcmpFalseFloat$entry: | 44 ; IASM-NEXT: .LfcmpFalseFloat$entry: |
(...skipping 12 matching lines...) Expand all Loading... |
57 | 57 |
58 define internal i32 @fcmpFalseDouble(double %a, double %b) { | 58 define internal i32 @fcmpFalseDouble(double %a, double %b) { |
59 entry: | 59 entry: |
60 %cmp = fcmp false double %a, %b | 60 %cmp = fcmp false double %a, %b |
61 %cmp.ret_ext = zext i1 %cmp to i32 | 61 %cmp.ret_ext = zext i1 %cmp to i32 |
62 ret i32 %cmp.ret_ext | 62 ret i32 %cmp.ret_ext |
63 } | 63 } |
64 | 64 |
65 ; ASM-LABEL: fcmpFalseDouble: | 65 ; ASM-LABEL: fcmpFalseDouble: |
66 ; ASM-NEXT: .LfcmpFalseDouble$entry: | 66 ; ASM-NEXT: .LfcmpFalseDouble$entry: |
67 ; ASM-NEXT: » addiu» $v0, $zero, 0 | 67 ; ASM: »addiu» $v0, $zero, 0 |
68 ; ASM-NEXT: andi $v0, $v0, 1 | 68 ; ASM-NEXT: andi $v0, $v0, 1 |
69 ; ASM-NEXT: jr $ra | 69 ; ASM-NEXT: jr $ra |
70 | 70 |
71 ; DIS-LABEL: 00000010 <fcmpFalseDouble>: | 71 ; DIS-LABEL: 00000010 <fcmpFalseDouble>: |
72 ; DIS-NEXT: 10: 24020000 li v0,0 | 72 ; DIS-NEXT: 10: 24020000 li v0,0 |
73 ; DIS-NEXT: 14: 30420001 andi v0,v0,0x1 | 73 ; DIS-NEXT: 14: 30420001 andi v0,v0,0x1 |
74 ; DIS-NEXT: 18: 03e00008 jr ra | 74 ; DIS-NEXT: 18: 03e00008 jr ra |
75 | 75 |
76 ; IASM-LABEL: fcmpFalseDouble: | 76 ; IASM-LABEL: fcmpFalseDouble: |
77 ; IASM-NEXT: .LfcmpFalseDouble$entry: | 77 ; IASM-NEXT: .LfcmpFalseDouble$entry: |
(...skipping 12 matching lines...) Expand all Loading... |
90 | 90 |
91 define internal i32 @fcmpOeqFloat(float %a, float %b) { | 91 define internal i32 @fcmpOeqFloat(float %a, float %b) { |
92 entry: | 92 entry: |
93 %cmp = fcmp oeq float %a, %b | 93 %cmp = fcmp oeq float %a, %b |
94 %cmp.ret_ext = zext i1 %cmp to i32 | 94 %cmp.ret_ext = zext i1 %cmp to i32 |
95 ret i32 %cmp.ret_ext | 95 ret i32 %cmp.ret_ext |
96 } | 96 } |
97 | 97 |
98 ; ASM-LABEL: fcmpOeqFloat | 98 ; ASM-LABEL: fcmpOeqFloat |
99 ; ASM-NEXT: .LfcmpOeqFloat$entry: | 99 ; ASM-NEXT: .LfcmpOeqFloat$entry: |
100 ; ASM-NEXT: » c.eq.s» $f12, $f14 | 100 ; ASM: »c.eq.s» $f12, $f14 |
101 ; ASM-NEXT: » addiu» $v0, $zero, 1 | 101 ; ASM: »addiu» $v0, $zero, 1 |
102 ; ASM-NEXT: » movf» $v0, $zero, $fcc0 | 102 ; ASM: »movf» $v0, $zero, $fcc0 |
103 ; ASM-NEXT: andi $v0, $v0, 1 | 103 ; ASM-NEXT: andi $v0, $v0, 1 |
104 ; ASM-NEXT: jr $ra | 104 ; ASM-NEXT: jr $ra |
105 | 105 |
106 ; DIS-LABEL: 00000020 <fcmpOeqFloat>: | 106 ; DIS-LABEL: 00000020 <fcmpOeqFloat>: |
107 ; DIS-NEXT: 20: 460e6032 c.eq.s $f12,$f14 | 107 ; DIS-NEXT: 20: 460e6032 c.eq.s $f12,$f14 |
108 ; DIS-NEXT: 24: 24020001 li v0,1 | 108 ; DIS-NEXT: 24: 24020001 li v0,1 |
109 ; DIS-NEXT: 28: 00001001 movf v0,zero,$fcc0 | 109 ; DIS-NEXT: 28: 00001001 movf v0,zero,$fcc0 |
110 ; DIS-NEXT: 2c: 30420001 andi v0,v0,0x1 | 110 ; DIS-NEXT: 2c: 30420001 andi v0,v0,0x1 |
111 ; DIS-NEXT: 30: 03e00008 jr ra | 111 ; DIS-NEXT: 30: 03e00008 jr ra |
112 | 112 |
(...skipping 22 matching lines...) Expand all Loading... |
135 | 135 |
136 define internal i32 @fcmpOeqDouble(double %a, double %b) { | 136 define internal i32 @fcmpOeqDouble(double %a, double %b) { |
137 entry: | 137 entry: |
138 %cmp = fcmp oeq double %a, %b | 138 %cmp = fcmp oeq double %a, %b |
139 %cmp.ret_ext = zext i1 %cmp to i32 | 139 %cmp.ret_ext = zext i1 %cmp to i32 |
140 ret i32 %cmp.ret_ext | 140 ret i32 %cmp.ret_ext |
141 } | 141 } |
142 | 142 |
143 ; ASM-LABEL: fcmpOeqDouble | 143 ; ASM-LABEL: fcmpOeqDouble |
144 ; ASM-NEXT: .LfcmpOeqDouble$entry: | 144 ; ASM-NEXT: .LfcmpOeqDouble$entry: |
145 ; ASM-NEXT: » c.eq.d» $f12, $f14 | 145 ; ASM: »c.eq.d» $f12, $f14 |
146 ; ASM-NEXT: » addiu» $v0, $zero, 1 | 146 ; ASM: »addiu» $v0, $zero, 1 |
147 ; ASM-NEXT: » movf» $v0, $zero, $fcc0 | 147 ; ASM: »movf» $v0, $zero, $fcc0 |
148 ; ASM-NEXT: andi $v0, $v0, 1 | 148 ; ASM-NEXT: andi $v0, $v0, 1 |
149 ; ASM-NEXT: jr $ra | 149 ; ASM-NEXT: jr $ra |
150 | 150 |
151 ; DIS-LABEL: 00000040 <fcmpOeqDouble>: | 151 ; DIS-LABEL: 00000040 <fcmpOeqDouble>: |
152 ; DIS-NEXT: 40: 462e6032 c.eq.d $f12,$f14 | 152 ; DIS-NEXT: 40: 462e6032 c.eq.d $f12,$f14 |
153 ; DIS-NEXT: 44: 24020001 li v0,1 | 153 ; DIS-NEXT: 44: 24020001 li v0,1 |
154 ; DIS-NEXT: 48: 00001001 movf v0,zero,$fcc0 | 154 ; DIS-NEXT: 48: 00001001 movf v0,zero,$fcc0 |
155 ; DIS-NEXT: 4c: 30420001 andi v0,v0,0x1 | 155 ; DIS-NEXT: 4c: 30420001 andi v0,v0,0x1 |
156 ; DIS-NEXT: 50: 03e00008 jr ra | 156 ; DIS-NEXT: 50: 03e00008 jr ra |
157 | 157 |
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180 | 180 |
181 define internal i32 @fcmpOgtFloat(float %a, float %b) { | 181 define internal i32 @fcmpOgtFloat(float %a, float %b) { |
182 entry: | 182 entry: |
183 %cmp = fcmp ogt float %a, %b | 183 %cmp = fcmp ogt float %a, %b |
184 %cmp.ret_ext = zext i1 %cmp to i32 | 184 %cmp.ret_ext = zext i1 %cmp to i32 |
185 ret i32 %cmp.ret_ext | 185 ret i32 %cmp.ret_ext |
186 } | 186 } |
187 | 187 |
188 ; ASM-LABEL: fcmpOgtFloat | 188 ; ASM-LABEL: fcmpOgtFloat |
189 ; ASM-NEXT: .LfcmpOgtFloat$entry: | 189 ; ASM-NEXT: .LfcmpOgtFloat$entry: |
190 ; ASM-NEXT: » c.ule.s»$f12, $f14 | 190 ; ASM: »c.ule.s»$f12, $f14 |
191 ; ASM-NEXT: » addiu» $v0, $zero, 1 | 191 ; ASM: »addiu» $v0, $zero, 1 |
192 ; ASM-NEXT: » movt» $v0, $zero, $fcc0 | 192 ; ASM: »movt» $v0, $zero, $fcc0 |
193 ; ASM-NEXT: andi $v0, $v0, 1 | 193 ; ASM-NEXT: andi $v0, $v0, 1 |
194 ; ASM-NEXT: jr $ra | 194 ; ASM-NEXT: jr $ra |
195 | 195 |
196 ; DIS-LABEL: 00000060 <fcmpOgtFloat>: | 196 ; DIS-LABEL: 00000060 <fcmpOgtFloat>: |
197 ; DIS-NEXT: 60: 460e6037 c.ule.s $f12,$f14 | 197 ; DIS-NEXT: 60: 460e6037 c.ule.s $f12,$f14 |
198 ; DIS-NEXT: 64: 24020001 li v0,1 | 198 ; DIS-NEXT: 64: 24020001 li v0,1 |
199 ; DIS-NEXT: 68: 00011001 movt v0,zero,$fcc0 | 199 ; DIS-NEXT: 68: 00011001 movt v0,zero,$fcc0 |
200 ; DIS-NEXT: 6c: 30420001 andi v0,v0,0x1 | 200 ; DIS-NEXT: 6c: 30420001 andi v0,v0,0x1 |
201 ; DIS-NEXT: 70: 03e00008 jr ra | 201 ; DIS-NEXT: 70: 03e00008 jr ra |
202 | 202 |
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225 | 225 |
226 define internal i32 @fcmpOgtDouble(double %a, double %b) { | 226 define internal i32 @fcmpOgtDouble(double %a, double %b) { |
227 entry: | 227 entry: |
228 %cmp = fcmp ogt double %a, %b | 228 %cmp = fcmp ogt double %a, %b |
229 %cmp.ret_ext = zext i1 %cmp to i32 | 229 %cmp.ret_ext = zext i1 %cmp to i32 |
230 ret i32 %cmp.ret_ext | 230 ret i32 %cmp.ret_ext |
231 } | 231 } |
232 | 232 |
233 ; ASM-LABEL: fcmpOgtDouble | 233 ; ASM-LABEL: fcmpOgtDouble |
234 ; ASM-NEXT: .LfcmpOgtDouble$entry: | 234 ; ASM-NEXT: .LfcmpOgtDouble$entry: |
235 ; ASM-NEXT: » c.ule.d»$f12, $f14 | 235 ; ASM: »c.ule.d»$f12, $f14 |
236 ; ASM-NEXT: » addiu» $v0, $zero, 1 | 236 ; ASM: »addiu» $v0, $zero, 1 |
237 ; ASM-NEXT: » movt» $v0, $zero, $fcc0 | 237 ; ASM: »movt» $v0, $zero, $fcc0 |
238 ; ASM-NEXT: andi $v0, $v0, 1 | 238 ; ASM-NEXT: andi $v0, $v0, 1 |
239 ; ASM-NEXT: jr $ra | 239 ; ASM-NEXT: jr $ra |
240 | 240 |
241 ; DIS-LABEL: 00000080 <fcmpOgtDouble>: | 241 ; DIS-LABEL: 00000080 <fcmpOgtDouble>: |
242 ; DIS-NEXT: 80: 462e6037 c.ule.d $f12,$f14 | 242 ; DIS-NEXT: 80: 462e6037 c.ule.d $f12,$f14 |
243 ; DIS-NEXT: 84: 24020001 li v0,1 | 243 ; DIS-NEXT: 84: 24020001 li v0,1 |
244 ; DIS-NEXT: 88: 00011001 movt v0,zero,$fcc0 | 244 ; DIS-NEXT: 88: 00011001 movt v0,zero,$fcc0 |
245 ; DIS-NEXT: 8c: 30420001 andi v0,v0,0x1 | 245 ; DIS-NEXT: 8c: 30420001 andi v0,v0,0x1 |
246 ; DIS-NEXT: 90: 03e00008 jr ra | 246 ; DIS-NEXT: 90: 03e00008 jr ra |
247 | 247 |
(...skipping 22 matching lines...) Expand all Loading... |
270 | 270 |
271 define internal i32 @fcmpOgeFloat(float %a, float %b) { | 271 define internal i32 @fcmpOgeFloat(float %a, float %b) { |
272 entry: | 272 entry: |
273 %cmp = fcmp oge float %a, %b | 273 %cmp = fcmp oge float %a, %b |
274 %cmp.ret_ext = zext i1 %cmp to i32 | 274 %cmp.ret_ext = zext i1 %cmp to i32 |
275 ret i32 %cmp.ret_ext | 275 ret i32 %cmp.ret_ext |
276 } | 276 } |
277 | 277 |
278 ; ASM-LABEL: fcmpOgeFloat | 278 ; ASM-LABEL: fcmpOgeFloat |
279 ; ASM-NEXT: .LfcmpOgeFloat$entry: | 279 ; ASM-NEXT: .LfcmpOgeFloat$entry: |
280 ; ASM-NEXT: » c.ult.s»$f12, $f14 | 280 ; ASM: »c.ult.s»$f12, $f14 |
281 ; ASM-NEXT: » addiu» $v0, $zero, 1 | 281 ; ASM: »addiu» $v0, $zero, 1 |
282 ; ASM-NEXT: » movt» $v0, $zero, $fcc0 | 282 ; ASM: »movt» $v0, $zero, $fcc0 |
283 ; ASM-NEXT: andi $v0, $v0, 1 | 283 ; ASM-NEXT: andi $v0, $v0, 1 |
284 ; ASM-NEXT: jr $ra | 284 ; ASM-NEXT: jr $ra |
285 | 285 |
286 ; DIS-LABEL: 000000a0 <fcmpOgeFloat>: | 286 ; DIS-LABEL: 000000a0 <fcmpOgeFloat>: |
287 ; DIS-NEXT: a0: 460e6035 c.ult.s $f12,$f14 | 287 ; DIS-NEXT: a0: 460e6035 c.ult.s $f12,$f14 |
288 ; DIS-NEXT: a4: 24020001 li v0,1 | 288 ; DIS-NEXT: a4: 24020001 li v0,1 |
289 ; DIS-NEXT: a8: 00011001 movt v0,zero,$fcc0 | 289 ; DIS-NEXT: a8: 00011001 movt v0,zero,$fcc0 |
290 ; DIS-NEXT: ac: 30420001 andi v0,v0,0x1 | 290 ; DIS-NEXT: ac: 30420001 andi v0,v0,0x1 |
291 ; DIS-NEXT: b0: 03e00008 jr ra | 291 ; DIS-NEXT: b0: 03e00008 jr ra |
292 | 292 |
(...skipping 22 matching lines...) Expand all Loading... |
315 | 315 |
316 define internal i32 @fcmpOgeDouble(double %a, double %b) { | 316 define internal i32 @fcmpOgeDouble(double %a, double %b) { |
317 entry: | 317 entry: |
318 %cmp = fcmp oge double %a, %b | 318 %cmp = fcmp oge double %a, %b |
319 %cmp.ret_ext = zext i1 %cmp to i32 | 319 %cmp.ret_ext = zext i1 %cmp to i32 |
320 ret i32 %cmp.ret_ext | 320 ret i32 %cmp.ret_ext |
321 } | 321 } |
322 | 322 |
323 ; ASM-LABEL: fcmpOgeDouble | 323 ; ASM-LABEL: fcmpOgeDouble |
324 ; ASM-NEXT: .LfcmpOgeDouble$entry: | 324 ; ASM-NEXT: .LfcmpOgeDouble$entry: |
325 ; ASM-NEXT: » c.ult.d»$f12, $f14 | 325 ; ASM: »c.ult.d»$f12, $f14 |
326 ; ASM-NEXT: » addiu» $v0, $zero, 1 | 326 ; ASM: »addiu» $v0, $zero, 1 |
327 ; ASM-NEXT: » movt» $v0, $zero, $fcc0 | 327 ; ASM: »movt» $v0, $zero, $fcc0 |
328 ; ASM-NEXT: andi $v0, $v0, 1 | 328 ; ASM-NEXT: andi $v0, $v0, 1 |
329 ; ASM-NEXT: jr $ra | 329 ; ASM-NEXT: jr $ra |
330 | 330 |
331 ; DIS-LABEL: 000000c0 <fcmpOgeDouble>: | 331 ; DIS-LABEL: 000000c0 <fcmpOgeDouble>: |
332 ; DIS-NEXT: c0: 462e6035 c.ult.d $f12,$f14 | 332 ; DIS-NEXT: c0: 462e6035 c.ult.d $f12,$f14 |
333 ; DIS-NEXT: c4: 24020001 li v0,1 | 333 ; DIS-NEXT: c4: 24020001 li v0,1 |
334 ; DIS-NEXT: c8: 00011001 movt v0,zero,$fcc0 | 334 ; DIS-NEXT: c8: 00011001 movt v0,zero,$fcc0 |
335 ; DIS-NEXT: cc: 30420001 andi v0,v0,0x1 | 335 ; DIS-NEXT: cc: 30420001 andi v0,v0,0x1 |
336 ; DIS-NEXT: d0: 03e00008 jr ra | 336 ; DIS-NEXT: d0: 03e00008 jr ra |
337 | 337 |
(...skipping 22 matching lines...) Expand all Loading... |
360 | 360 |
361 define internal i32 @fcmpOltFloat(float %a, float %b) { | 361 define internal i32 @fcmpOltFloat(float %a, float %b) { |
362 entry: | 362 entry: |
363 %cmp = fcmp olt float %a, %b | 363 %cmp = fcmp olt float %a, %b |
364 %cmp.ret_ext = zext i1 %cmp to i32 | 364 %cmp.ret_ext = zext i1 %cmp to i32 |
365 ret i32 %cmp.ret_ext | 365 ret i32 %cmp.ret_ext |
366 } | 366 } |
367 | 367 |
368 ; ASM-LABEL: fcmpOltFloat | 368 ; ASM-LABEL: fcmpOltFloat |
369 ; ASM-NEXT: .LfcmpOltFloat$entry: | 369 ; ASM-NEXT: .LfcmpOltFloat$entry: |
370 ; ASM-NEXT: » c.olt.s»$f12, $f14 | 370 ; ASM: »c.olt.s»$f12, $f14 |
371 ; ASM-NEXT: » addiu» $v0, $zero, 1 | 371 ; ASM: »addiu» $v0, $zero, 1 |
372 ; ASM-NEXT: » movf» $v0, $zero, $fcc0 | 372 ; ASM: »movf» $v0, $zero, $fcc0 |
373 ; ASM-NEXT: andi $v0, $v0, 1 | 373 ; ASM-NEXT: andi $v0, $v0, 1 |
374 ; ASM-NEXT: jr $ra | 374 ; ASM-NEXT: jr $ra |
375 | 375 |
376 ; DIS-LABEL: 000000e0 <fcmpOltFloat>: | 376 ; DIS-LABEL: 000000e0 <fcmpOltFloat>: |
377 ; DIS-NEXT: e0: 460e6034 c.olt.s $f12,$f14 | 377 ; DIS-NEXT: e0: 460e6034 c.olt.s $f12,$f14 |
378 ; DIS-NEXT: e4: 24020001 li v0,1 | 378 ; DIS-NEXT: e4: 24020001 li v0,1 |
379 ; DIS-NEXT: e8: 00001001 movf v0,zero,$fcc0 | 379 ; DIS-NEXT: e8: 00001001 movf v0,zero,$fcc0 |
380 ; DIS-NEXT: ec: 30420001 andi v0,v0,0x1 | 380 ; DIS-NEXT: ec: 30420001 andi v0,v0,0x1 |
381 ; DIS-NEXT: f0: 03e00008 jr ra | 381 ; DIS-NEXT: f0: 03e00008 jr ra |
382 | 382 |
(...skipping 22 matching lines...) Expand all Loading... |
405 | 405 |
406 define internal i32 @fcmpOltDouble(double %a, double %b) { | 406 define internal i32 @fcmpOltDouble(double %a, double %b) { |
407 entry: | 407 entry: |
408 %cmp = fcmp olt double %a, %b | 408 %cmp = fcmp olt double %a, %b |
409 %cmp.ret_ext = zext i1 %cmp to i32 | 409 %cmp.ret_ext = zext i1 %cmp to i32 |
410 ret i32 %cmp.ret_ext | 410 ret i32 %cmp.ret_ext |
411 } | 411 } |
412 | 412 |
413 ; ASM-LABEL: fcmpOltDouble | 413 ; ASM-LABEL: fcmpOltDouble |
414 ; ASM-NEXT: .LfcmpOltDouble$entry: | 414 ; ASM-NEXT: .LfcmpOltDouble$entry: |
415 ; ASM-NEXT: » c.olt.d»$f12, $f14 | 415 ; ASM: »c.olt.d»$f12, $f14 |
416 ; ASM-NEXT: » addiu» $v0, $zero, 1 | 416 ; ASM: »addiu» $v0, $zero, 1 |
417 ; ASM-NEXT: » movf» $v0, $zero, $fcc0 | 417 ; ASM: »movf» $v0, $zero, $fcc0 |
418 ; ASM-NEXT: andi $v0, $v0, 1 | 418 ; ASM-NEXT: andi $v0, $v0, 1 |
419 ; ASM-NEXT: jr $ra | 419 ; ASM-NEXT: jr $ra |
420 | 420 |
421 ; DIS-LABEL: 00000100 <fcmpOltDouble>: | 421 ; DIS-LABEL: 00000100 <fcmpOltDouble>: |
422 ; DIS-NEXT: 100: 462e6034 c.olt.d $f12,$f14 | 422 ; DIS-NEXT: 100: 462e6034 c.olt.d $f12,$f14 |
423 ; DIS-NEXT: 104: 24020001 li v0,1 | 423 ; DIS-NEXT: 104: 24020001 li v0,1 |
424 ; DIS-NEXT: 108: 00001001 movf v0,zero,$fcc0 | 424 ; DIS-NEXT: 108: 00001001 movf v0,zero,$fcc0 |
425 ; DIS-NEXT: 10c: 30420001 andi v0,v0,0x1 | 425 ; DIS-NEXT: 10c: 30420001 andi v0,v0,0x1 |
426 ; DIS-NEXT: 110: 03e00008 jr ra | 426 ; DIS-NEXT: 110: 03e00008 jr ra |
427 | 427 |
(...skipping 22 matching lines...) Expand all Loading... |
450 | 450 |
451 define internal i32 @fcmpOleFloat(float %a, float %b) { | 451 define internal i32 @fcmpOleFloat(float %a, float %b) { |
452 entry: | 452 entry: |
453 %cmp = fcmp ole float %a, %b | 453 %cmp = fcmp ole float %a, %b |
454 %cmp.ret_ext = zext i1 %cmp to i32 | 454 %cmp.ret_ext = zext i1 %cmp to i32 |
455 ret i32 %cmp.ret_ext | 455 ret i32 %cmp.ret_ext |
456 } | 456 } |
457 | 457 |
458 ; ASM-LABEL: fcmpOleFloat | 458 ; ASM-LABEL: fcmpOleFloat |
459 ; ASM-NEXT: .LfcmpOleFloat$entry: | 459 ; ASM-NEXT: .LfcmpOleFloat$entry: |
460 ; ASM-NEXT: » c.ole.s»$f12, $f14 | 460 ; ASM: »c.ole.s»$f12, $f14 |
461 ; ASM-NEXT: » addiu» $v0, $zero, 1 | 461 ; ASM: »addiu» $v0, $zero, 1 |
462 ; ASM-NEXT: » movf» $v0, $zero, $fcc0 | 462 ; ASM: »movf» $v0, $zero, $fcc0 |
463 ; ASM-NEXT: andi $v0, $v0, 1 | 463 ; ASM-NEXT: andi $v0, $v0, 1 |
464 ; ASM-NEXT: jr $ra | 464 ; ASM-NEXT: jr $ra |
465 | 465 |
466 ; DIS-LABEL: 00000120 <fcmpOleFloat>: | 466 ; DIS-LABEL: 00000120 <fcmpOleFloat>: |
467 ; DIS-NEXT: 120: 460e6036 c.ole.s $f12,$f14 | 467 ; DIS-NEXT: 120: 460e6036 c.ole.s $f12,$f14 |
468 ; DIS-NEXT: 124: 24020001 li v0,1 | 468 ; DIS-NEXT: 124: 24020001 li v0,1 |
469 ; DIS-NEXT: 128: 00001001 movf v0,zero,$fcc0 | 469 ; DIS-NEXT: 128: 00001001 movf v0,zero,$fcc0 |
470 ; DIS-NEXT: 12c: 30420001 andi v0,v0,0x1 | 470 ; DIS-NEXT: 12c: 30420001 andi v0,v0,0x1 |
471 ; DIS-NEXT: 130: 03e00008 jr ra | 471 ; DIS-NEXT: 130: 03e00008 jr ra |
472 | 472 |
(...skipping 22 matching lines...) Expand all Loading... |
495 | 495 |
496 define internal i32 @fcmpOleDouble(double %a, double %b) { | 496 define internal i32 @fcmpOleDouble(double %a, double %b) { |
497 entry: | 497 entry: |
498 %cmp = fcmp ole double %a, %b | 498 %cmp = fcmp ole double %a, %b |
499 %cmp.ret_ext = zext i1 %cmp to i32 | 499 %cmp.ret_ext = zext i1 %cmp to i32 |
500 ret i32 %cmp.ret_ext | 500 ret i32 %cmp.ret_ext |
501 } | 501 } |
502 | 502 |
503 ; ASM-LABEL: fcmpOleDouble | 503 ; ASM-LABEL: fcmpOleDouble |
504 ; ASM-NEXT: .LfcmpOleDouble$entry: | 504 ; ASM-NEXT: .LfcmpOleDouble$entry: |
505 ; ASM-NEXT: » c.ole.d»$f12, $f14 | 505 ; ASM: »c.ole.d»$f12, $f14 |
506 ; ASM-NEXT: » addiu» $v0, $zero, 1 | 506 ; ASM: »addiu» $v0, $zero, 1 |
507 ; ASM-NEXT: » movf» $v0, $zero, $fcc0 | 507 ; ASM: »movf» $v0, $zero, $fcc0 |
508 ; ASM-NEXT: andi $v0, $v0, 1 | 508 ; ASM-NEXT: andi $v0, $v0, 1 |
509 ; ASM-NEXT: jr $ra | 509 ; ASM-NEXT: jr $ra |
510 | 510 |
511 ; DIS-LABEL: 00000140 <fcmpOleDouble>: | 511 ; DIS-LABEL: 00000140 <fcmpOleDouble>: |
512 ; DIS-NEXT: 140: 462e6036 c.ole.d $f12,$f14 | 512 ; DIS-NEXT: 140: 462e6036 c.ole.d $f12,$f14 |
513 ; DIS-NEXT: 144: 24020001 li v0,1 | 513 ; DIS-NEXT: 144: 24020001 li v0,1 |
514 ; DIS-NEXT: 148: 00001001 movf v0,zero,$fcc0 | 514 ; DIS-NEXT: 148: 00001001 movf v0,zero,$fcc0 |
515 ; DIS-NEXT: 14c: 30420001 andi v0,v0,0x1 | 515 ; DIS-NEXT: 14c: 30420001 andi v0,v0,0x1 |
516 ; DIS-NEXT: 150: 03e00008 jr ra | 516 ; DIS-NEXT: 150: 03e00008 jr ra |
517 | 517 |
(...skipping 22 matching lines...) Expand all Loading... |
540 | 540 |
541 define internal i32 @fcmpOneFloat(float %a, float %b) { | 541 define internal i32 @fcmpOneFloat(float %a, float %b) { |
542 entry: | 542 entry: |
543 %cmp = fcmp one float %a, %b | 543 %cmp = fcmp one float %a, %b |
544 %cmp.ret_ext = zext i1 %cmp to i32 | 544 %cmp.ret_ext = zext i1 %cmp to i32 |
545 ret i32 %cmp.ret_ext | 545 ret i32 %cmp.ret_ext |
546 } | 546 } |
547 | 547 |
548 ; ASM-LABEL: fcmpOneFloat | 548 ; ASM-LABEL: fcmpOneFloat |
549 ; ASM-NEXT: .LfcmpOneFloat$entry: | 549 ; ASM-NEXT: .LfcmpOneFloat$entry: |
550 ; ASM-NEXT: » c.ueq.s»$f12, $f14 | 550 ; ASM: »c.ueq.s»$f12, $f14 |
551 ; ASM-NEXT: » addiu» $v0, $zero, 1 | 551 ; ASM: »addiu» $v0, $zero, 1 |
552 ; ASM-NEXT: » movt» $v0, $zero, $fcc0 | 552 ; ASM: »movt» $v0, $zero, $fcc0 |
553 ; ASM-NEXT: andi $v0, $v0, 1 | 553 ; ASM-NEXT: andi $v0, $v0, 1 |
554 ; ASM-NEXT: jr $ra | 554 ; ASM-NEXT: jr $ra |
555 | 555 |
556 ; DIS-LABEL: 00000160 <fcmpOneFloat>: | 556 ; DIS-LABEL: 00000160 <fcmpOneFloat>: |
557 ; DIS-NEXT: 160: 460e6033 c.ueq.s $f12,$f14 | 557 ; DIS-NEXT: 160: 460e6033 c.ueq.s $f12,$f14 |
558 ; DIS-NEXT: 164: 24020001 li v0,1 | 558 ; DIS-NEXT: 164: 24020001 li v0,1 |
559 ; DIS-NEXT: 168: 00011001 movt v0,zero,$fcc0 | 559 ; DIS-NEXT: 168: 00011001 movt v0,zero,$fcc0 |
560 ; DIS-NEXT: 16c: 30420001 andi v0,v0,0x1 | 560 ; DIS-NEXT: 16c: 30420001 andi v0,v0,0x1 |
561 ; DIS-NEXT: 170: 03e00008 jr ra | 561 ; DIS-NEXT: 170: 03e00008 jr ra |
562 | 562 |
(...skipping 22 matching lines...) Expand all Loading... |
585 | 585 |
586 define internal i32 @fcmpOneDouble(double %a, double %b) { | 586 define internal i32 @fcmpOneDouble(double %a, double %b) { |
587 entry: | 587 entry: |
588 %cmp = fcmp one double %a, %b | 588 %cmp = fcmp one double %a, %b |
589 %cmp.ret_ext = zext i1 %cmp to i32 | 589 %cmp.ret_ext = zext i1 %cmp to i32 |
590 ret i32 %cmp.ret_ext | 590 ret i32 %cmp.ret_ext |
591 } | 591 } |
592 | 592 |
593 ; ASM-LABEL: fcmpOneDouble | 593 ; ASM-LABEL: fcmpOneDouble |
594 ; ASM-NEXT: .LfcmpOneDouble$entry: | 594 ; ASM-NEXT: .LfcmpOneDouble$entry: |
595 ; ASM-NEXT: » c.ueq.d»$f12, $f14 | 595 ; ASM: »c.ueq.d»$f12, $f14 |
596 ; ASM-NEXT: » addiu» $v0, $zero, 1 | 596 ; ASM: »addiu» $v0, $zero, 1 |
597 ; ASM-NEXT: » movt» $v0, $zero, $fcc0 | 597 ; ASM: »movt» $v0, $zero, $fcc0 |
598 ; ASM-NEXT: andi $v0, $v0, 1 | 598 ; ASM-NEXT: andi $v0, $v0, 1 |
599 ; ASM-NEXT: jr $ra | 599 ; ASM-NEXT: jr $ra |
600 | 600 |
601 ; DIS-LABEL: 00000180 <fcmpOneDouble>: | 601 ; DIS-LABEL: 00000180 <fcmpOneDouble>: |
602 ; DIS-NEXT: 180: 462e6033 c.ueq.d $f12,$f14 | 602 ; DIS-NEXT: 180: 462e6033 c.ueq.d $f12,$f14 |
603 ; DIS-NEXT: 184: 24020001 li v0,1 | 603 ; DIS-NEXT: 184: 24020001 li v0,1 |
604 ; DIS-NEXT: 188: 00011001 movt v0,zero,$fcc0 | 604 ; DIS-NEXT: 188: 00011001 movt v0,zero,$fcc0 |
605 ; DIS-NEXT: 18c: 30420001 andi v0,v0,0x1 | 605 ; DIS-NEXT: 18c: 30420001 andi v0,v0,0x1 |
606 ; DIS-NEXT: 190: 03e00008 jr ra | 606 ; DIS-NEXT: 190: 03e00008 jr ra |
607 | 607 |
(...skipping 22 matching lines...) Expand all Loading... |
630 | 630 |
631 define internal i32 @fcmpOrdFloat(float %a, float %b) { | 631 define internal i32 @fcmpOrdFloat(float %a, float %b) { |
632 entry: | 632 entry: |
633 %cmp = fcmp ord float %a, %b | 633 %cmp = fcmp ord float %a, %b |
634 %cmp.ret_ext = zext i1 %cmp to i32 | 634 %cmp.ret_ext = zext i1 %cmp to i32 |
635 ret i32 %cmp.ret_ext | 635 ret i32 %cmp.ret_ext |
636 } | 636 } |
637 | 637 |
638 ; ASM-LABEL: fcmpOrdFloat: | 638 ; ASM-LABEL: fcmpOrdFloat: |
639 ; ASM-NEXT: .LfcmpOrdFloat$entry: | 639 ; ASM-NEXT: .LfcmpOrdFloat$entry: |
640 ; ASM-NEXT: » c.un.s» $f12, $f14 | 640 ; ASM: »c.un.s» $f12, $f14 |
641 ; ASM-NEXT: » addiu» $v0, $zero, 1 | 641 ; ASM: »addiu» $v0, $zero, 1 |
642 ; ASM-NEXT: » movt» $v0, $zero, $fcc0 | 642 ; ASM: »movt» $v0, $zero, $fcc0 |
643 ; ASM-NEXT: andi $v0, $v0, 1 | 643 ; ASM-NEXT: andi $v0, $v0, 1 |
644 ; ASM-NEXT: jr $ra | 644 ; ASM-NEXT: jr $ra |
645 | 645 |
646 ; DIS-LABEL: 000001a0 <fcmpOrdFloat>: | 646 ; DIS-LABEL: 000001a0 <fcmpOrdFloat>: |
647 ; DIS-NEXT: 1a0: 460e6031 c.un.s $f12,$f14 | 647 ; DIS-NEXT: 1a0: 460e6031 c.un.s $f12,$f14 |
648 ; DIS-NEXT: 1a4: 24020001 li v0,1 | 648 ; DIS-NEXT: 1a4: 24020001 li v0,1 |
649 ; DIS-NEXT: 1a8: 00011001 movt v0,zero,$fcc0 | 649 ; DIS-NEXT: 1a8: 00011001 movt v0,zero,$fcc0 |
650 ; DIS-NEXT: 1ac: 30420001 andi v0,v0,0x1 | 650 ; DIS-NEXT: 1ac: 30420001 andi v0,v0,0x1 |
651 ; DIS-NEXT: 1b0: 03e00008 jr ra | 651 ; DIS-NEXT: 1b0: 03e00008 jr ra |
652 | 652 |
(...skipping 22 matching lines...) Expand all Loading... |
675 | 675 |
676 define internal i32 @fcmpOrdDouble(double %a, double %b) { | 676 define internal i32 @fcmpOrdDouble(double %a, double %b) { |
677 entry: | 677 entry: |
678 %cmp = fcmp ord double %a, %b | 678 %cmp = fcmp ord double %a, %b |
679 %cmp.ret_ext = zext i1 %cmp to i32 | 679 %cmp.ret_ext = zext i1 %cmp to i32 |
680 ret i32 %cmp.ret_ext | 680 ret i32 %cmp.ret_ext |
681 } | 681 } |
682 | 682 |
683 ; ASM-LABEL: fcmpOrdDouble: | 683 ; ASM-LABEL: fcmpOrdDouble: |
684 ; ASM-NEXT: .LfcmpOrdDouble$entry: | 684 ; ASM-NEXT: .LfcmpOrdDouble$entry: |
685 ; ASM-NEXT: » c.un.d» $f12, $f14 | 685 ; ASM: »c.un.d» $f12, $f14 |
686 ; ASM-NEXT: » addiu» $v0, $zero, 1 | 686 ; ASM: »addiu» $v0, $zero, 1 |
687 ; ASM-NEXT: » movt» $v0, $zero, $fcc0 | 687 ; ASM: »movt» $v0, $zero, $fcc0 |
688 ; ASM-NEXT: andi $v0, $v0, 1 | 688 ; ASM-NEXT: andi $v0, $v0, 1 |
689 ; ASM-NEXT: jr $ra | 689 ; ASM-NEXT: jr $ra |
690 | 690 |
691 ; DIS-LABEL: 000001c0 <fcmpOrdDouble>: | 691 ; DIS-LABEL: 000001c0 <fcmpOrdDouble>: |
692 ; DIS-NEXT: 1c0: 462e6031 c.un.d $f12,$f14 | 692 ; DIS-NEXT: 1c0: 462e6031 c.un.d $f12,$f14 |
693 ; DIS-NEXT: 1c4: 24020001 li v0,1 | 693 ; DIS-NEXT: 1c4: 24020001 li v0,1 |
694 ; DIS-NEXT: 1c8: 00011001 movt v0,zero,$fcc0 | 694 ; DIS-NEXT: 1c8: 00011001 movt v0,zero,$fcc0 |
695 ; DIS-NEXT: 1cc: 30420001 andi v0,v0,0x1 | 695 ; DIS-NEXT: 1cc: 30420001 andi v0,v0,0x1 |
696 ; DIS-NEXT: 1d0: 03e00008 jr ra | 696 ; DIS-NEXT: 1d0: 03e00008 jr ra |
697 | 697 |
(...skipping 22 matching lines...) Expand all Loading... |
720 | 720 |
721 define internal i32 @fcmpUeqFloat(float %a, float %b) { | 721 define internal i32 @fcmpUeqFloat(float %a, float %b) { |
722 entry: | 722 entry: |
723 %cmp = fcmp ueq float %a, %b | 723 %cmp = fcmp ueq float %a, %b |
724 %cmp.ret_ext = zext i1 %cmp to i32 | 724 %cmp.ret_ext = zext i1 %cmp to i32 |
725 ret i32 %cmp.ret_ext | 725 ret i32 %cmp.ret_ext |
726 } | 726 } |
727 | 727 |
728 ; ASM-LABEL: fcmpUeqFloat | 728 ; ASM-LABEL: fcmpUeqFloat |
729 ; ASM-NEXT: .LfcmpUeqFloat$entry: | 729 ; ASM-NEXT: .LfcmpUeqFloat$entry: |
730 ; ASM-NEXT: » c.ueq.s»$f12, $f14 | 730 ; ASM: »c.ueq.s»$f12, $f14 |
731 ; ASM-NEXT: » addiu» $v0, $zero, 1 | 731 ; ASM: »addiu» $v0, $zero, 1 |
732 ; ASM-NEXT: » movf» $v0, $zero, $fcc0 | 732 ; ASM: »movf» $v0, $zero, $fcc0 |
733 ; ASM-NEXT: andi $v0, $v0, 1 | 733 ; ASM-NEXT: andi $v0, $v0, 1 |
734 ; ASM-NEXT: jr $ra | 734 ; ASM-NEXT: jr $ra |
735 | 735 |
736 ; DIS-LABEL: 000001e0 <fcmpUeqFloat>: | 736 ; DIS-LABEL: 000001e0 <fcmpUeqFloat>: |
737 ; DIS-NEXT: 1e0: 460e6033 c.ueq.s $f12,$f14 | 737 ; DIS-NEXT: 1e0: 460e6033 c.ueq.s $f12,$f14 |
738 ; DIS-NEXT: 1e4: 24020001 li v0,1 | 738 ; DIS-NEXT: 1e4: 24020001 li v0,1 |
739 ; DIS-NEXT: 1e8: 00001001 movf v0,zero,$fcc0 | 739 ; DIS-NEXT: 1e8: 00001001 movf v0,zero,$fcc0 |
740 ; DIS-NEXT: 1ec: 30420001 andi v0,v0,0x1 | 740 ; DIS-NEXT: 1ec: 30420001 andi v0,v0,0x1 |
741 ; DIS-NEXT: 1f0: 03e00008 jr ra | 741 ; DIS-NEXT: 1f0: 03e00008 jr ra |
742 | 742 |
(...skipping 22 matching lines...) Expand all Loading... |
765 | 765 |
766 define internal i32 @fcmpUeqDouble(double %a, double %b) { | 766 define internal i32 @fcmpUeqDouble(double %a, double %b) { |
767 entry: | 767 entry: |
768 %cmp = fcmp ueq double %a, %b | 768 %cmp = fcmp ueq double %a, %b |
769 %cmp.ret_ext = zext i1 %cmp to i32 | 769 %cmp.ret_ext = zext i1 %cmp to i32 |
770 ret i32 %cmp.ret_ext | 770 ret i32 %cmp.ret_ext |
771 } | 771 } |
772 | 772 |
773 ; ASM-LABEL: fcmpUeqDouble | 773 ; ASM-LABEL: fcmpUeqDouble |
774 ; ASM-NEXT: .LfcmpUeqDouble$entry: | 774 ; ASM-NEXT: .LfcmpUeqDouble$entry: |
775 ; ASM-NEXT: » c.ueq.d»$f12, $f14 | 775 ; ASM: »c.ueq.d»$f12, $f14 |
776 ; ASM-NEXT: » addiu» $v0, $zero, 1 | 776 ; ASM: »addiu» $v0, $zero, 1 |
777 ; ASM-NEXT: » movf» $v0, $zero, $fcc0 | 777 ; ASM: »movf» $v0, $zero, $fcc0 |
778 ; ASM-NEXT: andi $v0, $v0, 1 | 778 ; ASM-NEXT: andi $v0, $v0, 1 |
779 ; ASM-NEXT: jr $ra | 779 ; ASM-NEXT: jr $ra |
780 | 780 |
781 ; DIS-LABEL: 00000200 <fcmpUeqDouble>: | 781 ; DIS-LABEL: 00000200 <fcmpUeqDouble>: |
782 ; DIS-NEXT: 200: 462e6033 c.ueq.d $f12,$f14 | 782 ; DIS-NEXT: 200: 462e6033 c.ueq.d $f12,$f14 |
783 ; DIS-NEXT: 204: 24020001 li v0,1 | 783 ; DIS-NEXT: 204: 24020001 li v0,1 |
784 ; DIS-NEXT: 208: 00001001 movf v0,zero,$fcc0 | 784 ; DIS-NEXT: 208: 00001001 movf v0,zero,$fcc0 |
785 ; DIS-NEXT: 20c: 30420001 andi v0,v0,0x1 | 785 ; DIS-NEXT: 20c: 30420001 andi v0,v0,0x1 |
786 ; DIS-NEXT: 210: 03e00008 jr ra | 786 ; DIS-NEXT: 210: 03e00008 jr ra |
787 | 787 |
(...skipping 22 matching lines...) Expand all Loading... |
810 | 810 |
811 define internal i32 @fcmpUgtFloat(float %a, float %b) { | 811 define internal i32 @fcmpUgtFloat(float %a, float %b) { |
812 entry: | 812 entry: |
813 %cmp = fcmp ugt float %a, %b | 813 %cmp = fcmp ugt float %a, %b |
814 %cmp.ret_ext = zext i1 %cmp to i32 | 814 %cmp.ret_ext = zext i1 %cmp to i32 |
815 ret i32 %cmp.ret_ext | 815 ret i32 %cmp.ret_ext |
816 } | 816 } |
817 | 817 |
818 ; ASM-LABEL: fcmpUgtFloat | 818 ; ASM-LABEL: fcmpUgtFloat |
819 ; ASM-NEXT: .LfcmpUgtFloat$entry: | 819 ; ASM-NEXT: .LfcmpUgtFloat$entry: |
820 ; ASM-NEXT: » c.ole.s»$f12, $f14 | 820 ; ASM: »c.ole.s»$f12, $f14 |
821 ; ASM-NEXT: » addiu» $v0, $zero, 1 | 821 ; ASM: »addiu» $v0, $zero, 1 |
822 ; ASM-NEXT: » movt» $v0, $zero, $fcc0 | 822 ; ASM: »movt» $v0, $zero, $fcc0 |
823 ; ASM-NEXT: andi $v0, $v0, 1 | 823 ; ASM-NEXT: andi $v0, $v0, 1 |
824 ; ASM-NEXT: jr $ra | 824 ; ASM-NEXT: jr $ra |
825 | 825 |
826 ; DIS-LABEL: 00000220 <fcmpUgtFloat>: | 826 ; DIS-LABEL: 00000220 <fcmpUgtFloat>: |
827 ; DIS-NEXT: 220: 460e6036 c.ole.s $f12,$f14 | 827 ; DIS-NEXT: 220: 460e6036 c.ole.s $f12,$f14 |
828 ; DIS-NEXT: 224: 24020001 li v0,1 | 828 ; DIS-NEXT: 224: 24020001 li v0,1 |
829 ; DIS-NEXT: 228: 00011001 movt v0,zero,$fcc0 | 829 ; DIS-NEXT: 228: 00011001 movt v0,zero,$fcc0 |
830 ; DIS-NEXT: 22c: 30420001 andi v0,v0,0x1 | 830 ; DIS-NEXT: 22c: 30420001 andi v0,v0,0x1 |
831 ; DIS-NEXT: 230: 03e00008 jr ra | 831 ; DIS-NEXT: 230: 03e00008 jr ra |
832 | 832 |
(...skipping 22 matching lines...) Expand all Loading... |
855 | 855 |
856 define internal i32 @fcmpUgtDouble(double %a, double %b) { | 856 define internal i32 @fcmpUgtDouble(double %a, double %b) { |
857 entry: | 857 entry: |
858 %cmp = fcmp ugt double %a, %b | 858 %cmp = fcmp ugt double %a, %b |
859 %cmp.ret_ext = zext i1 %cmp to i32 | 859 %cmp.ret_ext = zext i1 %cmp to i32 |
860 ret i32 %cmp.ret_ext | 860 ret i32 %cmp.ret_ext |
861 } | 861 } |
862 | 862 |
863 ; ASM-LABEL: fcmpUgtDouble | 863 ; ASM-LABEL: fcmpUgtDouble |
864 ; ASM-NEXT: .LfcmpUgtDouble$entry: | 864 ; ASM-NEXT: .LfcmpUgtDouble$entry: |
865 ; ASM-NEXT: » c.ole.d»$f12, $f14 | 865 ; ASM: »c.ole.d»$f12, $f14 |
866 ; ASM-NEXT: » addiu» $v0, $zero, 1 | 866 ; ASM: »addiu» $v0, $zero, 1 |
867 ; ASM-NEXT: » movt» $v0, $zero, $fcc0 | 867 ; ASM: »movt» $v0, $zero, $fcc0 |
868 ; ASM-NEXT: andi $v0, $v0, 1 | 868 ; ASM-NEXT: andi $v0, $v0, 1 |
869 ; ASM-NEXT: jr $ra | 869 ; ASM-NEXT: jr $ra |
870 | 870 |
871 ; DIS-LABEL: 00000240 <fcmpUgtDouble>: | 871 ; DIS-LABEL: 00000240 <fcmpUgtDouble>: |
872 ; DIS-NEXT: 240: 462e6036 c.ole.d $f12,$f14 | 872 ; DIS-NEXT: 240: 462e6036 c.ole.d $f12,$f14 |
873 ; DIS-NEXT: 244: 24020001 li v0,1 | 873 ; DIS-NEXT: 244: 24020001 li v0,1 |
874 ; DIS-NEXT: 248: 00011001 movt v0,zero,$fcc0 | 874 ; DIS-NEXT: 248: 00011001 movt v0,zero,$fcc0 |
875 ; DIS-NEXT: 24c: 30420001 andi v0,v0,0x1 | 875 ; DIS-NEXT: 24c: 30420001 andi v0,v0,0x1 |
876 ; DIS-NEXT: 250: 03e00008 jr ra | 876 ; DIS-NEXT: 250: 03e00008 jr ra |
877 | 877 |
(...skipping 22 matching lines...) Expand all Loading... |
900 | 900 |
901 define internal i32 @fcmpUgeFloat(float %a, float %b) { | 901 define internal i32 @fcmpUgeFloat(float %a, float %b) { |
902 entry: | 902 entry: |
903 %cmp = fcmp uge float %a, %b | 903 %cmp = fcmp uge float %a, %b |
904 %cmp.ret_ext = zext i1 %cmp to i32 | 904 %cmp.ret_ext = zext i1 %cmp to i32 |
905 ret i32 %cmp.ret_ext | 905 ret i32 %cmp.ret_ext |
906 } | 906 } |
907 | 907 |
908 ; ASM-LABEL: fcmpUgeFloat | 908 ; ASM-LABEL: fcmpUgeFloat |
909 ; ASM-NEXT: .LfcmpUgeFloat$entry: | 909 ; ASM-NEXT: .LfcmpUgeFloat$entry: |
910 ; ASM-NEXT: » c.olt.s»$f12, $f14 | 910 ; ASM: »c.olt.s»$f12, $f14 |
911 ; ASM-NEXT: » addiu» $v0, $zero, 1 | 911 ; ASM: »addiu» $v0, $zero, 1 |
912 ; ASM-NEXT: » movt» $v0, $zero, $fcc0 | 912 ; ASM: »movt» $v0, $zero, $fcc0 |
913 ; ASM-NEXT: andi $v0, $v0, 1 | 913 ; ASM-NEXT: andi $v0, $v0, 1 |
914 ; ASM-NEXT: jr $ra | 914 ; ASM-NEXT: jr $ra |
915 | 915 |
916 ; DIS-LABEL: 00000260 <fcmpUgeFloat>: | 916 ; DIS-LABEL: 00000260 <fcmpUgeFloat>: |
917 ; DIS-NEXT: 260: 460e6034 c.olt.s $f12,$f14 | 917 ; DIS-NEXT: 260: 460e6034 c.olt.s $f12,$f14 |
918 ; DIS-NEXT: 264: 24020001 li v0,1 | 918 ; DIS-NEXT: 264: 24020001 li v0,1 |
919 ; DIS-NEXT: 268: 00011001 movt v0,zero,$fcc0 | 919 ; DIS-NEXT: 268: 00011001 movt v0,zero,$fcc0 |
920 ; DIS-NEXT: 26c: 30420001 andi v0,v0,0x1 | 920 ; DIS-NEXT: 26c: 30420001 andi v0,v0,0x1 |
921 ; DIS-NEXT: 270: 03e00008 jr ra | 921 ; DIS-NEXT: 270: 03e00008 jr ra |
922 | 922 |
(...skipping 22 matching lines...) Expand all Loading... |
945 | 945 |
946 define internal i32 @fcmpUgeDouble(double %a, double %b) { | 946 define internal i32 @fcmpUgeDouble(double %a, double %b) { |
947 entry: | 947 entry: |
948 %cmp = fcmp uge double %a, %b | 948 %cmp = fcmp uge double %a, %b |
949 %cmp.ret_ext = zext i1 %cmp to i32 | 949 %cmp.ret_ext = zext i1 %cmp to i32 |
950 ret i32 %cmp.ret_ext | 950 ret i32 %cmp.ret_ext |
951 } | 951 } |
952 | 952 |
953 ; ASM-LABEL: fcmpUgeDouble | 953 ; ASM-LABEL: fcmpUgeDouble |
954 ; ASM-NEXT: .LfcmpUgeDouble$entry: | 954 ; ASM-NEXT: .LfcmpUgeDouble$entry: |
955 ; ASM-NEXT: » c.olt.d»$f12, $f14 | 955 ; ASM: »c.olt.d»$f12, $f14 |
956 ; ASM-NEXT: » addiu» $v0, $zero, 1 | 956 ; ASM: »addiu» $v0, $zero, 1 |
957 ; ASM-NEXT: » movt» $v0, $zero, $fcc0 | 957 ; ASM: »movt» $v0, $zero, $fcc0 |
958 ; ASM-NEXT: andi $v0, $v0, 1 | 958 ; ASM-NEXT: andi $v0, $v0, 1 |
959 ; ASM-NEXT: jr $ra | 959 ; ASM-NEXT: jr $ra |
960 | 960 |
961 ; DIS-LABEL: 00000280 <fcmpUgeDouble>: | 961 ; DIS-LABEL: 00000280 <fcmpUgeDouble>: |
962 ; DIS-NEXT: 280: 462e6034 c.olt.d $f12,$f14 | 962 ; DIS-NEXT: 280: 462e6034 c.olt.d $f12,$f14 |
963 ; DIS-NEXT: 284: 24020001 li v0,1 | 963 ; DIS-NEXT: 284: 24020001 li v0,1 |
964 ; DIS-NEXT: 288: 00011001 movt v0,zero,$fcc0 | 964 ; DIS-NEXT: 288: 00011001 movt v0,zero,$fcc0 |
965 ; DIS-NEXT: 28c: 30420001 andi v0,v0,0x1 | 965 ; DIS-NEXT: 28c: 30420001 andi v0,v0,0x1 |
966 ; DIS-NEXT: 290: 03e00008 jr ra | 966 ; DIS-NEXT: 290: 03e00008 jr ra |
967 | 967 |
(...skipping 22 matching lines...) Expand all Loading... |
990 | 990 |
991 define internal i32 @fcmpUltFloat(float %a, float %b) { | 991 define internal i32 @fcmpUltFloat(float %a, float %b) { |
992 entry: | 992 entry: |
993 %cmp = fcmp ult float %a, %b | 993 %cmp = fcmp ult float %a, %b |
994 %cmp.ret_ext = zext i1 %cmp to i32 | 994 %cmp.ret_ext = zext i1 %cmp to i32 |
995 ret i32 %cmp.ret_ext | 995 ret i32 %cmp.ret_ext |
996 } | 996 } |
997 | 997 |
998 ; ASM-LABEL: fcmpUltFloat | 998 ; ASM-LABEL: fcmpUltFloat |
999 ; ASM-NEXT: .LfcmpUltFloat$entry: | 999 ; ASM-NEXT: .LfcmpUltFloat$entry: |
1000 ; ASM-NEXT: » c.ult.s»$f12, $f14 | 1000 ; ASM: »c.ult.s»$f12, $f14 |
1001 ; ASM-NEXT: » addiu» $v0, $zero, 1 | 1001 ; ASM: »addiu» $v0, $zero, 1 |
1002 ; ASM-NEXT: » movf» $v0, $zero, $fcc0 | 1002 ; ASM: »movf» $v0, $zero, $fcc0 |
1003 ; ASM-NEXT: andi $v0, $v0, 1 | 1003 ; ASM-NEXT: andi $v0, $v0, 1 |
1004 ; ASM-NEXT: jr $ra | 1004 ; ASM-NEXT: jr $ra |
1005 | 1005 |
1006 ; DIS-LABEL: 000002a0 <fcmpUltFloat>: | 1006 ; DIS-LABEL: 000002a0 <fcmpUltFloat>: |
1007 ; DIS-NEXT: 2a0: 460e6035 c.ult.s $f12,$f14 | 1007 ; DIS-NEXT: 2a0: 460e6035 c.ult.s $f12,$f14 |
1008 ; DIS-NEXT: 2a4: 24020001 li v0,1 | 1008 ; DIS-NEXT: 2a4: 24020001 li v0,1 |
1009 ; DIS-NEXT: 2a8: 00001001 movf v0,zero,$fcc0 | 1009 ; DIS-NEXT: 2a8: 00001001 movf v0,zero,$fcc0 |
1010 ; DIS-NEXT: 2ac: 30420001 andi v0,v0,0x1 | 1010 ; DIS-NEXT: 2ac: 30420001 andi v0,v0,0x1 |
1011 ; DIS-NEXT: 2b0: 03e00008 jr ra | 1011 ; DIS-NEXT: 2b0: 03e00008 jr ra |
1012 | 1012 |
(...skipping 22 matching lines...) Expand all Loading... |
1035 | 1035 |
1036 define internal i32 @fcmpUltDouble(double %a, double %b) { | 1036 define internal i32 @fcmpUltDouble(double %a, double %b) { |
1037 entry: | 1037 entry: |
1038 %cmp = fcmp ult double %a, %b | 1038 %cmp = fcmp ult double %a, %b |
1039 %cmp.ret_ext = zext i1 %cmp to i32 | 1039 %cmp.ret_ext = zext i1 %cmp to i32 |
1040 ret i32 %cmp.ret_ext | 1040 ret i32 %cmp.ret_ext |
1041 } | 1041 } |
1042 | 1042 |
1043 ; ASM-LABEL: fcmpUltDouble | 1043 ; ASM-LABEL: fcmpUltDouble |
1044 ; ASM-NEXT: .LfcmpUltDouble$entry: | 1044 ; ASM-NEXT: .LfcmpUltDouble$entry: |
1045 ; ASM-NEXT: » c.ult.d»$f12, $f14 | 1045 ; ASM: »c.ult.d»$f12, $f14 |
1046 ; ASM-NEXT: » addiu» $v0, $zero, 1 | 1046 ; ASM: »addiu» $v0, $zero, 1 |
1047 ; ASM-NEXT: » movf» $v0, $zero, $fcc0 | 1047 ; ASM: »movf» $v0, $zero, $fcc0 |
1048 ; ASM-NEXT: andi $v0, $v0, 1 | 1048 ; ASM-NEXT: andi $v0, $v0, 1 |
1049 ; ASM-NEXT: jr $ra | 1049 ; ASM-NEXT: jr $ra |
1050 | 1050 |
1051 ; DIS-LABEL: 000002c0 <fcmpUltDouble>: | 1051 ; DIS-LABEL: 000002c0 <fcmpUltDouble>: |
1052 ; DIS-NEXT: 2c0: 462e6035 c.ult.d $f12,$f14 | 1052 ; DIS-NEXT: 2c0: 462e6035 c.ult.d $f12,$f14 |
1053 ; DIS-NEXT: 2c4: 24020001 li v0,1 | 1053 ; DIS-NEXT: 2c4: 24020001 li v0,1 |
1054 ; DIS-NEXT: 2c8: 00001001 movf v0,zero,$fcc0 | 1054 ; DIS-NEXT: 2c8: 00001001 movf v0,zero,$fcc0 |
1055 ; DIS-NEXT: 2cc: 30420001 andi v0,v0,0x1 | 1055 ; DIS-NEXT: 2cc: 30420001 andi v0,v0,0x1 |
1056 ; DIS-NEXT: 2d0: 03e00008 jr ra | 1056 ; DIS-NEXT: 2d0: 03e00008 jr ra |
1057 | 1057 |
(...skipping 22 matching lines...) Expand all Loading... |
1080 | 1080 |
1081 define internal i32 @fcmpUleFloat(float %a, float %b) { | 1081 define internal i32 @fcmpUleFloat(float %a, float %b) { |
1082 entry: | 1082 entry: |
1083 %cmp = fcmp ule float %a, %b | 1083 %cmp = fcmp ule float %a, %b |
1084 %cmp.ret_ext = zext i1 %cmp to i32 | 1084 %cmp.ret_ext = zext i1 %cmp to i32 |
1085 ret i32 %cmp.ret_ext | 1085 ret i32 %cmp.ret_ext |
1086 } | 1086 } |
1087 | 1087 |
1088 ; ASM-LABEL: fcmpUleFloat | 1088 ; ASM-LABEL: fcmpUleFloat |
1089 ; ASM-NEXT: .LfcmpUleFloat$entry: | 1089 ; ASM-NEXT: .LfcmpUleFloat$entry: |
1090 ; ASM-NEXT: » c.ule.s»$f12, $f14 | 1090 ; ASM: »c.ule.s»$f12, $f14 |
1091 ; ASM-NEXT: » addiu» $v0, $zero, 1 | 1091 ; ASM: »addiu» $v0, $zero, 1 |
1092 ; ASM-NEXT: » movf» $v0, $zero, $fcc0 | 1092 ; ASM: »movf» $v0, $zero, $fcc0 |
1093 ; ASM-NEXT: andi $v0, $v0, 1 | 1093 ; ASM-NEXT: andi $v0, $v0, 1 |
1094 ; ASM-NEXT: jr $ra | 1094 ; ASM-NEXT: jr $ra |
1095 | 1095 |
1096 ; DIS-LABEL: 000002e0 <fcmpUleFloat>: | 1096 ; DIS-LABEL: 000002e0 <fcmpUleFloat>: |
1097 ; DIS-NEXT: 2e0: 460e6037 c.ule.s $f12,$f14 | 1097 ; DIS-NEXT: 2e0: 460e6037 c.ule.s $f12,$f14 |
1098 ; DIS-NEXT: 2e4: 24020001 li v0,1 | 1098 ; DIS-NEXT: 2e4: 24020001 li v0,1 |
1099 ; DIS-NEXT: 2e8: 00001001 movf v0,zero,$fcc0 | 1099 ; DIS-NEXT: 2e8: 00001001 movf v0,zero,$fcc0 |
1100 ; DIS-NEXT: 2ec: 30420001 andi v0,v0,0x1 | 1100 ; DIS-NEXT: 2ec: 30420001 andi v0,v0,0x1 |
1101 ; DIS-NEXT: 2f0: 03e00008 jr ra | 1101 ; DIS-NEXT: 2f0: 03e00008 jr ra |
1102 | 1102 |
(...skipping 22 matching lines...) Expand all Loading... |
1125 | 1125 |
1126 define internal i32 @fcmpUleDouble(double %a, double %b) { | 1126 define internal i32 @fcmpUleDouble(double %a, double %b) { |
1127 entry: | 1127 entry: |
1128 %cmp = fcmp ule double %a, %b | 1128 %cmp = fcmp ule double %a, %b |
1129 %cmp.ret_ext = zext i1 %cmp to i32 | 1129 %cmp.ret_ext = zext i1 %cmp to i32 |
1130 ret i32 %cmp.ret_ext | 1130 ret i32 %cmp.ret_ext |
1131 } | 1131 } |
1132 | 1132 |
1133 ; ASM-LABEL: fcmpUleDouble | 1133 ; ASM-LABEL: fcmpUleDouble |
1134 ; ASM-NEXT: .LfcmpUleDouble$entry: | 1134 ; ASM-NEXT: .LfcmpUleDouble$entry: |
1135 ; ASM-NEXT: » c.ule.d»$f12, $f14 | 1135 ; ASM: »c.ule.d»$f12, $f14 |
1136 ; ASM-NEXT: » addiu» $v0, $zero, 1 | 1136 ; ASM: »addiu» $v0, $zero, 1 |
1137 ; ASM-NEXT: » movf» $v0, $zero, $fcc0 | 1137 ; ASM: »movf» $v0, $zero, $fcc0 |
1138 ; ASM-NEXT: andi $v0, $v0, 1 | 1138 ; ASM-NEXT: andi $v0, $v0, 1 |
1139 ; ASM-NEXT: jr $ra | 1139 ; ASM-NEXT: jr $ra |
1140 | 1140 |
1141 ; DIS-LABEL: 00000300 <fcmpUleDouble>: | 1141 ; DIS-LABEL: 00000300 <fcmpUleDouble>: |
1142 ; DIS-NEXT: 300: 462e6037 c.ule.d $f12,$f14 | 1142 ; DIS-NEXT: 300: 462e6037 c.ule.d $f12,$f14 |
1143 ; DIS-NEXT: 304: 24020001 li v0,1 | 1143 ; DIS-NEXT: 304: 24020001 li v0,1 |
1144 ; DIS-NEXT: 308: 00001001 movf v0,zero,$fcc0 | 1144 ; DIS-NEXT: 308: 00001001 movf v0,zero,$fcc0 |
1145 ; DIS-NEXT: 30c: 30420001 andi v0,v0,0x1 | 1145 ; DIS-NEXT: 30c: 30420001 andi v0,v0,0x1 |
1146 ; DIS-NEXT: 310: 03e00008 jr ra | 1146 ; DIS-NEXT: 310: 03e00008 jr ra |
1147 | 1147 |
(...skipping 22 matching lines...) Expand all Loading... |
1170 | 1170 |
1171 define internal i32 @fcmpUneFloat(float %a, float %b) { | 1171 define internal i32 @fcmpUneFloat(float %a, float %b) { |
1172 entry: | 1172 entry: |
1173 %cmp = fcmp une float %a, %b | 1173 %cmp = fcmp une float %a, %b |
1174 %cmp.ret_ext = zext i1 %cmp to i32 | 1174 %cmp.ret_ext = zext i1 %cmp to i32 |
1175 ret i32 %cmp.ret_ext | 1175 ret i32 %cmp.ret_ext |
1176 } | 1176 } |
1177 | 1177 |
1178 ; ASM-LABEL: fcmpUneFloat | 1178 ; ASM-LABEL: fcmpUneFloat |
1179 ; ASM-NEXT: .LfcmpUneFloat$entry: | 1179 ; ASM-NEXT: .LfcmpUneFloat$entry: |
1180 ; ASM-NEXT: » c.eq.s» $f12, $f14 | 1180 ; ASM: »c.eq.s» $f12, $f14 |
1181 ; ASM-NEXT: » addiu» $v0, $zero, 1 | 1181 ; ASM: »addiu» $v0, $zero, 1 |
1182 ; ASM-NEXT: » movt» $v0, $zero, $fcc0 | 1182 ; ASM: »movt» $v0, $zero, $fcc0 |
1183 ; ASM-NEXT: andi $v0, $v0, 1 | 1183 ; ASM-NEXT: andi $v0, $v0, 1 |
1184 ; ASM-NEXT: jr $ra | 1184 ; ASM-NEXT: jr $ra |
1185 | 1185 |
1186 ; DIS-LABEL: 00000320 <fcmpUneFloat>: | 1186 ; DIS-LABEL: 00000320 <fcmpUneFloat>: |
1187 ; DIS-NEXT: 320: 460e6032 c.eq.s $f12,$f14 | 1187 ; DIS-NEXT: 320: 460e6032 c.eq.s $f12,$f14 |
1188 ; DIS-NEXT: 324: 24020001 li v0,1 | 1188 ; DIS-NEXT: 324: 24020001 li v0,1 |
1189 ; DIS-NEXT: 328: 00011001 movt v0,zero,$fcc0 | 1189 ; DIS-NEXT: 328: 00011001 movt v0,zero,$fcc0 |
1190 ; DIS-NEXT: 32c: 30420001 andi v0,v0,0x1 | 1190 ; DIS-NEXT: 32c: 30420001 andi v0,v0,0x1 |
1191 ; DIS-NEXT: 330: 03e00008 jr ra | 1191 ; DIS-NEXT: 330: 03e00008 jr ra |
1192 | 1192 |
(...skipping 22 matching lines...) Expand all Loading... |
1215 | 1215 |
1216 define internal i32 @fcmpUneDouble(double %a, double %b) { | 1216 define internal i32 @fcmpUneDouble(double %a, double %b) { |
1217 entry: | 1217 entry: |
1218 %cmp = fcmp une double %a, %b | 1218 %cmp = fcmp une double %a, %b |
1219 %cmp.ret_ext = zext i1 %cmp to i32 | 1219 %cmp.ret_ext = zext i1 %cmp to i32 |
1220 ret i32 %cmp.ret_ext | 1220 ret i32 %cmp.ret_ext |
1221 } | 1221 } |
1222 | 1222 |
1223 ; ASM-LABEL: fcmpUneDouble | 1223 ; ASM-LABEL: fcmpUneDouble |
1224 ; ASM-NEXT: .LfcmpUneDouble$entry: | 1224 ; ASM-NEXT: .LfcmpUneDouble$entry: |
1225 ; ASM-NEXT: » c.eq.d» $f12, $f14 | 1225 ; ASM: »c.eq.d» $f12, $f14 |
1226 ; ASM-NEXT: » addiu» $v0, $zero, 1 | 1226 ; ASM: »addiu» $v0, $zero, 1 |
1227 ; ASM-NEXT: » movt» $v0, $zero, $fcc0 | 1227 ; ASM: »movt» $v0, $zero, $fcc0 |
1228 ; ASM-NEXT: andi $v0, $v0, 1 | 1228 ; ASM-NEXT: andi $v0, $v0, 1 |
1229 ; ASM-NEXT: jr $ra | 1229 ; ASM-NEXT: jr $ra |
1230 | 1230 |
1231 ; DIS-LABEL: 00000340 <fcmpUneDouble>: | 1231 ; DIS-LABEL: 00000340 <fcmpUneDouble>: |
1232 ; DIS-NEXT: 340: 462e6032 c.eq.d $f12,$f14 | 1232 ; DIS-NEXT: 340: 462e6032 c.eq.d $f12,$f14 |
1233 ; DIS-NEXT: 344: 24020001 li v0,1 | 1233 ; DIS-NEXT: 344: 24020001 li v0,1 |
1234 ; DIS-NEXT: 348: 00011001 movt v0,zero,$fcc0 | 1234 ; DIS-NEXT: 348: 00011001 movt v0,zero,$fcc0 |
1235 ; DIS-NEXT: 34c: 30420001 andi v0,v0,0x1 | 1235 ; DIS-NEXT: 34c: 30420001 andi v0,v0,0x1 |
1236 ; DIS-NEXT: 350: 03e00008 jr ra | 1236 ; DIS-NEXT: 350: 03e00008 jr ra |
1237 | 1237 |
(...skipping 22 matching lines...) Expand all Loading... |
1260 | 1260 |
1261 define internal i32 @fcmpUnoFloat(float %a, float %b) { | 1261 define internal i32 @fcmpUnoFloat(float %a, float %b) { |
1262 entry: | 1262 entry: |
1263 %cmp = fcmp uno float %a, %b | 1263 %cmp = fcmp uno float %a, %b |
1264 %cmp.ret_ext = zext i1 %cmp to i32 | 1264 %cmp.ret_ext = zext i1 %cmp to i32 |
1265 ret i32 %cmp.ret_ext | 1265 ret i32 %cmp.ret_ext |
1266 } | 1266 } |
1267 | 1267 |
1268 ; ASM-LABEL: fcmpUnoFloat | 1268 ; ASM-LABEL: fcmpUnoFloat |
1269 ; ASM-NEXT: .LfcmpUnoFloat$entry: | 1269 ; ASM-NEXT: .LfcmpUnoFloat$entry: |
1270 ; ASM-NEXT: » c.un.s» $f12, $f14 | 1270 ; ASM: »c.un.s» $f12, $f14 |
1271 ; ASM-NEXT: » addiu» $v0, $zero, 1 | 1271 ; ASM: »addiu» $v0, $zero, 1 |
1272 ; ASM-NEXT: » movf» $v0, $zero, $fcc0 | 1272 ; ASM: »movf» $v0, $zero, $fcc0 |
1273 ; ASM-NEXT: andi $v0, $v0, 1 | 1273 ; ASM-NEXT: andi $v0, $v0, 1 |
1274 ; ASM-NEXT: jr $ra | 1274 ; ASM-NEXT: jr $ra |
1275 | 1275 |
1276 ; DIS-LABEL: 00000360 <fcmpUnoFloat>: | 1276 ; DIS-LABEL: 00000360 <fcmpUnoFloat>: |
1277 ; DIS-NEXT: 360: 460e6031 c.un.s $f12,$f14 | 1277 ; DIS-NEXT: 360: 460e6031 c.un.s $f12,$f14 |
1278 ; DIS-NEXT: 364: 24020001 li v0,1 | 1278 ; DIS-NEXT: 364: 24020001 li v0,1 |
1279 ; DIS-NEXT: 368: 00001001 movf v0,zero,$fcc0 | 1279 ; DIS-NEXT: 368: 00001001 movf v0,zero,$fcc0 |
1280 ; DIS-NEXT: 36c: 30420001 andi v0,v0,0x1 | 1280 ; DIS-NEXT: 36c: 30420001 andi v0,v0,0x1 |
1281 ; DIS-NEXT: 370: 03e00008 jr ra | 1281 ; DIS-NEXT: 370: 03e00008 jr ra |
1282 | 1282 |
(...skipping 22 matching lines...) Expand all Loading... |
1305 | 1305 |
1306 define internal i32 @fcmpUnoDouble(double %a, double %b) { | 1306 define internal i32 @fcmpUnoDouble(double %a, double %b) { |
1307 entry: | 1307 entry: |
1308 %cmp = fcmp uno double %a, %b | 1308 %cmp = fcmp uno double %a, %b |
1309 %cmp.ret_ext = zext i1 %cmp to i32 | 1309 %cmp.ret_ext = zext i1 %cmp to i32 |
1310 ret i32 %cmp.ret_ext | 1310 ret i32 %cmp.ret_ext |
1311 } | 1311 } |
1312 | 1312 |
1313 ; ASM-LABEL: fcmpUnoDouble | 1313 ; ASM-LABEL: fcmpUnoDouble |
1314 ; ASM-NEXT: .LfcmpUnoDouble$entry: | 1314 ; ASM-NEXT: .LfcmpUnoDouble$entry: |
1315 ; ASM-NEXT: » c.un.d» $f12, $f14 | 1315 ; ASM: »c.un.d» $f12, $f14 |
1316 ; ASM-NEXT: » addiu» $v0, $zero, 1 | 1316 ; ASM: »addiu» $v0, $zero, 1 |
1317 ; ASM-NEXT: » movf» $v0, $zero, $fcc0 | 1317 ; ASM: »movf» $v0, $zero, $fcc0 |
1318 ; ASM-NEXT: andi $v0, $v0, 1 | 1318 ; ASM-NEXT: andi $v0, $v0, 1 |
1319 ; ASM-NEXT: jr $ra | 1319 ; ASM-NEXT: jr $ra |
1320 | 1320 |
1321 ; DIS-LABEL: 00000380 <fcmpUnoDouble>: | 1321 ; DIS-LABEL: 00000380 <fcmpUnoDouble>: |
1322 ; DIS-NEXT: 380: 462e6031 c.un.d $f12,$f14 | 1322 ; DIS-NEXT: 380: 462e6031 c.un.d $f12,$f14 |
1323 ; DIS-NEXT: 384: 24020001 li v0,1 | 1323 ; DIS-NEXT: 384: 24020001 li v0,1 |
1324 ; DIS-NEXT: 388: 00001001 movf v0,zero,$fcc0 | 1324 ; DIS-NEXT: 388: 00001001 movf v0,zero,$fcc0 |
1325 ; DIS-NEXT: 38c: 30420001 andi v0,v0,0x1 | 1325 ; DIS-NEXT: 38c: 30420001 andi v0,v0,0x1 |
1326 ; DIS-NEXT: 390: 03e00008 jr ra | 1326 ; DIS-NEXT: 390: 03e00008 jr ra |
1327 | 1327 |
(...skipping 22 matching lines...) Expand all Loading... |
1350 | 1350 |
1351 define internal i32 @fcmpTrueFloat(float %a, float %b) { | 1351 define internal i32 @fcmpTrueFloat(float %a, float %b) { |
1352 entry: | 1352 entry: |
1353 %cmp = fcmp true float %a, %b | 1353 %cmp = fcmp true float %a, %b |
1354 %cmp.ret_ext = zext i1 %cmp to i32 | 1354 %cmp.ret_ext = zext i1 %cmp to i32 |
1355 ret i32 %cmp.ret_ext | 1355 ret i32 %cmp.ret_ext |
1356 } | 1356 } |
1357 | 1357 |
1358 ; ASM-LABEL: fcmpTrueFloat | 1358 ; ASM-LABEL: fcmpTrueFloat |
1359 ; ASM-NEXT: .LfcmpTrueFloat$entry: | 1359 ; ASM-NEXT: .LfcmpTrueFloat$entry: |
1360 ; ASM-NEXT: » addiu» $v0, $zero, 1 | 1360 ; ASM: »addiu» $v0, $zero, 1 |
1361 ; ASM-NEXT: andi $v0, $v0, 1 | 1361 ; ASM-NEXT: andi $v0, $v0, 1 |
1362 ; ASM-NEXT: jr $ra | 1362 ; ASM-NEXT: jr $ra |
1363 | 1363 |
1364 ; DIS-LABEL: 000003a0 <fcmpTrueFloat>: | 1364 ; DIS-LABEL: 000003a0 <fcmpTrueFloat>: |
1365 ; DIS-NEXT: 3a0: 24020001 li v0,1 | 1365 ; DIS-NEXT: 3a0: 24020001 li v0,1 |
1366 ; DIS-NEXT: 3a4: 30420001 andi v0,v0,0x1 | 1366 ; DIS-NEXT: 3a4: 30420001 andi v0,v0,0x1 |
1367 ; DIS-NEXT: 3a8: 03e00008 jr ra | 1367 ; DIS-NEXT: 3a8: 03e00008 jr ra |
1368 | 1368 |
1369 ; IASM-LABEL: fcmpTrueFloat: | 1369 ; IASM-LABEL: fcmpTrueFloat: |
1370 ; IASM-NEXT: .LfcmpTrueFloat$entry: | 1370 ; IASM-NEXT: .LfcmpTrueFloat$entry: |
(...skipping 12 matching lines...) Expand all Loading... |
1383 | 1383 |
1384 define internal i32 @fcmpTrueDouble(double %a, double %b) { | 1384 define internal i32 @fcmpTrueDouble(double %a, double %b) { |
1385 entry: | 1385 entry: |
1386 %cmp = fcmp true double %a, %b | 1386 %cmp = fcmp true double %a, %b |
1387 %cmp.ret_ext = zext i1 %cmp to i32 | 1387 %cmp.ret_ext = zext i1 %cmp to i32 |
1388 ret i32 %cmp.ret_ext | 1388 ret i32 %cmp.ret_ext |
1389 } | 1389 } |
1390 | 1390 |
1391 ; ASM-LABEL: fcmpTrueDouble | 1391 ; ASM-LABEL: fcmpTrueDouble |
1392 ; ASM-NEXT: .LfcmpTrueDouble$entry: | 1392 ; ASM-NEXT: .LfcmpTrueDouble$entry: |
1393 ; ASM-NEXT: » addiu» $v0, $zero, 1 | 1393 ; ASM: »addiu» $v0, $zero, 1 |
1394 ; ASM-NEXT: andi $v0, $v0, 1 | 1394 ; ASM-NEXT: andi $v0, $v0, 1 |
1395 ; ASM-NEXT: jr $ra | 1395 ; ASM-NEXT: jr $ra |
1396 | 1396 |
1397 ; DIS-LABEL: 000003b0 <fcmpTrueDouble>: | 1397 ; DIS-LABEL: 000003b0 <fcmpTrueDouble>: |
1398 ; DIS-NEXT: 3b0: 24020001 li v0,1 | 1398 ; DIS-NEXT: 3b0: 24020001 li v0,1 |
1399 ; DIS-NEXT: 3b4: 30420001 andi v0,v0,0x1 | 1399 ; DIS-NEXT: 3b4: 30420001 andi v0,v0,0x1 |
1400 ; DIS-NEXT: 3b8: 03e00008 jr ra | 1400 ; DIS-NEXT: 3b8: 03e00008 jr ra |
1401 | 1401 |
1402 ; IASM-LABEL: fcmpTrueDouble: | 1402 ; IASM-LABEL: fcmpTrueDouble: |
1403 ; IASM-NEXT: .LfcmpTrueDouble$entry: | 1403 ; IASM-NEXT: .LfcmpTrueDouble$entry: |
1404 ; IASM-NEXT: .byte 0x1 | 1404 ; IASM-NEXT: .byte 0x1 |
1405 ; IASM-NEXT: .byte 0x0 | 1405 ; IASM-NEXT: .byte 0x0 |
1406 ; IASM-NEXT: .byte 0x2 | 1406 ; IASM-NEXT: .byte 0x2 |
1407 ; IASM-NEXT: .byte 0x24 | 1407 ; IASM-NEXT: .byte 0x24 |
1408 ; IASM-NEXT: .byte 0x1 | 1408 ; IASM-NEXT: .byte 0x1 |
1409 ; IASM-NEXT: .byte 0x0 | 1409 ; IASM-NEXT: .byte 0x0 |
1410 ; IASM-NEXT: .byte 0x42 | 1410 ; IASM-NEXT: .byte 0x42 |
1411 ; IASM-NEXT: .byte 0x30 | 1411 ; IASM-NEXT: .byte 0x30 |
1412 ; IASM-NEXT: .byte 0x8 | 1412 ; IASM-NEXT: .byte 0x8 |
1413 ; IASM-NEXT: .byte 0x0 | 1413 ; IASM-NEXT: .byte 0x0 |
1414 ; IASM-NEXT: .byte 0xe0 | 1414 ; IASM-NEXT: .byte 0xe0 |
1415 ; IASM-NEXT: .byte 0x3 | 1415 ; IASM-NEXT: .byte 0x3 |
OLD | NEW |